Muon New Small Wheel sTGC-VMM Wish-list for VMM2

1. Muon New Small WheelsTGC-VMMWish-list for VMM2 Electronics Workshop - December 2012 Les Houches Lupu N. Vdovin A. Technion I.I.T.

2. VMM as an ASIC for sTGC • In sTGC detector the same VMM works in three modes : • Mode for STRIPS. • Mode for PADS. • Mode for WIRES. • Each Mode has its particular requirements. Lupu N. Vdovin A. Technion I.I.T.

3. The Wish-List The wish list has one single entry : The VMM should satisfy the requirements for the three modes of operation as an IDEAL Front-End ASIC. Lupu N. Vdovin A. Technion I.I.T.

4. The 3 modes characteristics are: • For Wires : • The input signal has negative polarity • The amount of charge is relatively high (0.05-1pc ). We do not have yet direct experience with VMM1 connected to wires. Lupu N. Vdovin A. Technion I.I.T.

5. Modes characteristics cont. • For Strips : • The input signal has positive polarity • The amount of charge has a wide range ( 20 fC to 500 fC ) • The output should be a number representing the charge induced in one strip . • The precision of the measurement determines the precision of the calculated position of the event . Lupu N. Vdovin A. Technion I.I.T.

6. Modes characteristics cont. • For Pads: • The input signal has positive polarity. • The amount of charge is relatively high ( 50 fC to 500 fC ). • The output should be a logic pulse used in building the trigger and the latency should be as short as possible (~ <25 ns) . • The time walk should be less than 3 ns. And not dependent of the input value or shape. Lupu N. Vdovin A. Technion I.I.T.

7. Some facts of life • From the brief description of the functionality presented one should be able to derive the required parameters of the IDEAL device . • In my opinion this approach is not useful and productive at this point in time. • We have a first prototype the VMM1 and some experience already in using it. • The second iteration should improve and complement with what is missing in the first. Lupu N. Vdovin A. Technion I.I.T.

8. Complements • Already some additions to the present architecture are agreed upon: • For the use with strips, the fast conversion of charge to digital with the methods : • Fast flash ADC for each channel , non linear, with serial output. • Peak to Time and external Time to Digital • ……. Possible other method. Lupu N. Vdovin A. Technion I.I.T.

9. Complements agreed upon or proposed: • Some new ranges for the Gain. A range with 3.5 mV/fC is required. • Some Logic and Internal 10 bits ADC. • External Trigger. • Data Readout. • Possibility of Simultaneous Measurement and Readout. Lupu N. Vdovin A. Technion I.I.T.

10. Corrections and Improvements • Some corrections are obvious and agreed to be carried-out like: • The leakage of the protection diode. • Variation of Gain with the change in Peaking Time. • For positive signals some unexpected results are troublesome, as shown to some extend in the following slides. Lupu N. Vdovin A. Technion I.I.T.

11. The value of the saturation levelat the Monitor Analog output is low and limits the dynamic linear range Signal rate 1kHz , Injected Charge from external pulse generator with 1pF capacitor. Lupu N. Vdovin A. Technion I.I.T.

12. Channel 3 at the same conditions The saturation is at a small difference 40 mV higher Lupu N. Vdovin A. Technion I.I.T.

13. The Saturation Value changes with the change in Gain. For 7.2 mV/fC is even lower that for 2.24 mV/fC Lupu N. Vdovin A. Technion I.I.T.

14. About Saturation • The question here is which stage in the amplifier is saturating . The shape of the signal at the Analog Monitor Output is normal, quasi-Gaussian as expected , but constant in amplitude and duration. If so the Discriminator sees a constant signal shape and generates a constant ToT. The same will happened with Peak to Time or Flash ADC. Lupu N. Vdovin A. Technion I.I.T.

15. The walk of the Leading edge of the ToT with change of the Input Signal Lupu N. Vdovin A. Technion I.I.T.

16. The walk of the Leading edge of the ToT with change of the Input Signal VMM1-1 Ch-2 Gain 7.2 mV/fC Peaking time 25 ns Lupu N. Vdovin A. Technion I.I.T.

17. ToT latency dependency of the input charge • Can this situation be improved ? • This causes a jitter of the output which affects the trigger timing. Lupu N. Vdovin A. Technion I.I.T.

18. When signals are in the linear range the results are good VMM1-1 Ch-2 Lupu N. Vdovin A. Technion I.I.T.

19. Response of VMM1 to 2 signals with variable delay between them A minimum delay of 150 ns is possible without pileup. In this case after saturation The true value of the second pulse is available only after 2us. Lupu N. Vdovin A. Technion I.I.T.

20. ToT Dead Time introduced by the saturation of the first pulse . Dead time of 1000 ns and 3000 ns for x2 and x3 signals respectively. VMM1-1 Ch-2 Gain 2.24 mV/fC Threshold 250, blue 150 fC, red X2 , green X3 Lupu N. Vdovin A. Technion I.I.T.

21. Saturation of the first pulse creates a dead time bigger than 1000 ns so the second pulse has not a ToT response VMM1-1 Ch-3 Gain 2.24 mV/fC Thr 250 Rate 1 kHz First pulse 450 fC Second pulse 150fC First pulse response is putting The channel in deep saturation Lupu N. Vdovin A. Technion I.I.T.

22. The list for studies and improvements • One point that it looks to ask for improving is RECOVERY from SATURATION . • Is this behavior a result of the provisional fix for the leakage of the protection diode or a feature of the architecture of the analog circuitry ? • The same for the level of saturation . Lupu N. Vdovin A. Technion I.I.T.

23. VMM digital wish-list • Serial port to read unique-id chip on each chamber • Increment the readout token as it passes each chip so that each ASD will have a geographical address. • Ability to readout 5 BCIDs in order to do the timing calibration • Configurable delay for BC clock to account for delay in its clock distribution • Redundant scheme for token and readout in case chip dies: bi-directional self-healing ring • Channel masks: force on, force off. Trigger separate from readout • 12 bit BCID, 8 bit L1Accept counter • Do we want special action on calibrate trigger type • First chip to send data sends header and marks header-done in token. • “where are you? (WRU)” trigger: each chip reports its BCID and geo-address Lorne Levinson

24. CONCLUSIONS • Much experience with VMM1 has being gained in working in the lab and in the beam-tests. • As expected much work is to be done for a useful and successful VMM2. Lupu N. Vdovin A. Technion I.I.T.

25. Backups • Some more examples of behaviors of VMM1 analog circuitry in saturation or different rates of signal. Lupu N. Vdovin A. Technion I.I.T.

26. ToT Output Delay from the Start of the Input Pulse Lupu N. Vdovin A. Technion I.I.T.

27. For one pulse, Threshold as param. Lupu N. Vdovin A. Technion I.I.T.

28. For one pulse Lupu N. Vdovin A. Technion I.I.T.

29. Two Pulses ToT Leading Edge Delay Thr. 500 for Gain 7.2 mV/fC and first Pulse in Saturation Lupu N. Vdovin A. Technion I.I.T.

30. Signal in linear range VMM1-1 Ch-2Rate dependency Lupu N. Vdovin A. Technion I.I.T.

31. Saturation Level for 2 Rates Lupu N. Vdovin A. Technion I.I.T.

32. The effect of high signal and high rate • The analog output of the monitor saturates at ~ 900 mV . • The delay of ToT from start is about the same. • Thresholds 250 • A change in the bias Due to High Rate ? Lupu N. Vdovin A. Technion I.I.T.

33. Effect of saturation on the shape of single input pulse • The shape of the analog output does not change Lupu N. Vdovin A. Technion I.I.T.

34. Dependence of the Analog Output of the Delay between to pulses The recovery from saturation as well as the amplification of the second pulse is a problem Lupu N. Vdovin A. Technion I.I.T.

35. Effect of saturation on double pulse response of VMM1-1 Ch3 • Gain 2.24 mV/fC Rate 100kHz First pulse ~300 fC Second ~ 150 fC The amplitude of the second output is smaller by ~ 100 mV than it should be. Lupu N. Vdovin A. Technion I.I.T.

36. VMM1An ASIC for Micropattern Detectors • An ideal shape for the shaper of ToT, to reduce the WALK when used with pads for timing. Lupu N. Vdovin A. Technion I.I.T.