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(Yet another) decision procedure for Equality Logic

(Yet another) decision procedure for Equality Logic. Ofer Strichman and Orly Meir Technion. 0. 0. 0. 1. 0. 1. Equality Logic.  E : ( x 1 = x 2 Æ ( x 2 = x 3 Ç x 1  x 3 )) Domain : x 1 , x 2 , x 3 2 N

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(Yet another) decision procedure for Equality Logic

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  1. (Yet another) decision procedure for Equality Logic Ofer Strichman and Orly Meir Technion Technion

  2. 0 0 0 1 0 1 Equality Logic • E: (x1 = x2Æ (x2=x3Çx1x3)) • Domain: x1,x2,x32N • The satisfiability problem: is there an assignment tox1,x2,x3 that satisfiesE ? • Q: When is Equality Logic useful ?... Technion

  3. 0 0 0 1 0 1 Equality Logic • E: (x1 = x2Æ (x2=x3Çx1x3)) • A: Mainly when combined with Uninterpreted Functions f(x,y), g(z),… • Uninterpreted Functions can be reduced to Equality Logic via e.g. Ackermann’s reduction. • Mainly used in proving equivalences, but not only. Technion

  4. y x z Basic notions E: x = yÆy = zÆzx (non-polar) Equality Graph: Gives an abstract view of E Technion

  5. From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method x1 E :x1 = x2Æx2 = x3Æx1x3 B : e1,2 Æe2,3Æ:e1,3 • Encode all edges with Boolean variables • This is an abstraction • Transitivity of equality is lost! • Must add transitivity constraints! e1,2 e1,3 x2 e2,3 x3 Technion

  6. From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method x1 E :x1 = x2Æx2 = x3Æx1x3 B : e1,2 Æe2,3Æ:e1,3 • Transitivity Constraints: For each cycle of size n, forbid a true assignment to n-1 edges T S = (e1,2Æe2,3!e1,3) Æ (e1,2Æe1,3!e2,3) Æ (e1,3Æe2,3!e1,2) Check: BÆTS e1,2 e1,3 x2 e2,3 x3 Technion

  7. From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method • Thm-1: It is sufficient to constrain simple cycles only T T e2 e3 T e4 F e1 e5 e6 T T Technion

  8. From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method • Thm-2: It is sufficient to constrain chord-free simple cycles T e2 T e5 T e1 F e3 F e4 T Technion

  9. From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method • Still, there can be an exponential number of chord-free simple cycles… • Solution: make the graph ‘chordal’ by adding edges. …. Technion

  10. From Equality to Propositional LogicBryant & VelevCAV’00 – the Sparse method • In a chordal graph, it is sufficient to constrain only triangles. • Polynomial # of edges and constraints. • # constraints = 3 £ #triangles T T T T Contradiction! T F T Technion

  11. An improvementReduced Transitivity Constraints (RTC) • So far we did not consider the polarity of the edges. • Assuming E is in Negation Normal Form E: x = yÆy = zÆzx y (polar) Equality Graph: = = x z  Technion

  12. Monotonicity of NNF • Thm-3: NNF formulas aremonotonically satisfied(in CNF this is simply the pure literal rule) • Let  be in NNF and satisfiable. Thm-3 implies: • Let ² • Derive ’ from  by switching the value of a ‘mis-assigned’ pure literal in  • Now ’ ² Technion

  13. z  = = e3 e1 y x e2 An improvementReduced Transitivity Constraints (RTC) • Claim: in the following graph T R = e3Æe2!e1 is sufficient • This is only true because of monotonicity of NNF Allowing e.g. x = z, x = y, zy F T T Technion

  14. y x z Basic notions • Equality Path: a path made of equalities. we writex =*z • Disequality Path: a path made of equalities and exactly one disequality. We writex*y • Contradictory Cycle: two nodesxandy, s.t. x=*yandx*y form a contradictory cycle Technion

  15. Basic notions • Thm-4: Every contradictory cycle is either simple or contains a simple contradictory cycle Technion

  16. T T C = T T F Definitions • Dfn: A contradictory Cycle C is constrained underT if T does not allow this assignment Technion

  17. Main theorem • IfT Rconstrains all simple contradictory cycles, and For every assignment S, S²T S!S²T R • then E is satisfiable iff BÆT R is satisfiable From the Sparse method The Equality Formula Technion

  18. Proof of the main theorem • () E is satisfiable  BÆT S is satisfiable  BÆT R is satisfiable • () Proof strategy: • LetRbe a satisfying assignment toBÆT R • We will construct Sthat satisfies BÆT S • From this we will conclude thatEis satisfiable Skip proof Technion

  19. Applying RTC • How can we use the theorem without enumerating contradictory cycles ? • Answer: • Consider the chordal graph. • Constrain triangles if they are part of a (simple) contradictory cycle • How? Technion

  20. Focus on Bi-connected dashed components built on top of a solid edge • Includes all contradictory cycles involving this edge Technion

  21. Make the component chordal • Chordal-ity guarantees: every cycle contains a simplicial vertex, i.e. a vertex that its neighbors are connected. Technion

  22. Constraints cache: e2Æ e3! e1 e4Æ e7! e2 e5Æ e8! e4 The RTC algorithm 5 8 4 7 6 3 2 9 1 12 11 Technion

  23. Constraints cache: e2Æ e3! e1 e4Æ e7! e2 e6Æ e3! e4 Constrains all contradictory cycles 5 8 4 7 6 3 2 9 1 12 11 Technion

  24. Results – random graphs V=200, E=800, 16 random topologies Technion

  25. ResultsUclid benchmarks (all unsat) Technion

  26. Random graphs (Satisfiable) Technion

  27. Possible refutations of CNF’s generated by Sparse Æ T S B B T R P3 P0 P4 T S – T R P1 P2 Constraints of the form e1Æ e2! e3 Hypothesis: (T S – T R) clauses hardly participate in the proof Thm: B is satisfiable !B Æ (T S – T R) is satisfiable Technion

  28. B T R Average on: 10 graphs, ~890K clauses All Unsat Sparse: ~ 22 sec. RTC: ~ 12 Sec. T S- T R B T R T S- T R Technion

  29. Example: Circuit Transformations Stage 1 • A pipeline processes data in stages • Data is processed in parallel – as in an assembly line • Formal Model: Stage 2 Stage 3 Technion

  30. Example: Circuit Transformations • The maximum clock frequency depends on the longest path between two latches • Note that the output of g is usedas input to k • We want to speed up the design by postponing k to the third stage Technion

  31. Validating Circuit Transformations ? = Technion

  32. Source program z= (x1+y1)  (x2+y2); Target program u1=x1+y1;u2=x2+y2;z=u1u2 ; Validating a compilation process Compilation • Need to prove that:(u1=x1+y1 u2=x2+y2  z=u1u2) $z= (x1+y1)  (x2+y2) Source Target Technion

  33. Validating a compilation process • Target program u1=x1+y1;u2=x2+y2;z=u1u2 ; • Source program z= (x1+y1)  (x2+y2); Compilation • Need to prove that:(u1=x1+y1 u2=x2+y2  z=u1u2) $z= (x1+y1)  (x2+y2) g1 f1 f2 f1 f2 g2 Technion

  34. Need to prove that:(u1=x1+y1 u2=x2+y2  z=u1u2) $z= (x1+y1)  (x2+y2) g1 f1 f2 f1 f2 g2 Validating a compilation process • Instead, prove: under functional consistency: for every uninterpreted function fx = y!f(x) = f(y) • Which translates to (via Ackermann’s reduction): Technion

  35. Definitions for the proof… • A Violating cycle under an assignment R: • This assignment violates T S but not necessarily T R Either dashed or solid eT1 F T eF T eT2 Technion

  36. More definitions for the proof… • An edge e = (vi,vj) is equal under an assignment  iff there is an equality path between vi and vj all assigned T under . Denote: v3 T F T v1 v2 T T Technion

  37. More definitions for the proof… • An edge e = (vi,vj) is disequal under an assignment  iff there is a disequality path between vi and vj in which the solid edge is the only one assigned false by . Denote: v3 T F T v1 v2 T T Technion

  38. v3 F T T v1 v2 Proof… • Observation 1:The combinationis impossible if = R(recall:R²T R) • Observation 2: if (v1,v3) is solid, then Technion

  39. Type 1: It is not the case that Assign S (e23) = F Type 2: Otherwise it is not the case that Assign  (e13) = T ReConstructing S v3 v3 F F T  T T  F T T v1 v1 v2 v2 In all other casesS = R Technion

  40. ReConstructing S • Starting from R, repeat until convergence: • (eT) := F in all Type 1 cycles • (eF) := T in all Type 2 cycles • All Type 1 and Type 2 triangles now satisfy T S • B is still satisfied (monotonicity of NNF) • Left to prove: all contradictory cycles are still satisfied Technion

  41. T T Proof… • Invariant: contradictory cycles are not violating throughout the reconstruction. • contradicts the precondition to make this assignment… v3 F T  F T v1 v2 Technion

  42. T F Proof… • Invariant: contradictory cycles are not violating throughout the reconstruction. • contradicts the precondition to make this assignment… v3 F  T T T v1 v2 Technion

  43. Constraining simple contradictory cycles The constraint e3,6 Æe3,5 e5,6is not added cache: … e5,6 Æe4,6 e4,5 x2 x0 x4 x1 x5 x3 x6 Open problem: constrain simple contradictory cycles in P time Technion

  44. Constraining simple contradictory cycles the constraint e3,6 Æe3,5 e5,6is not added, though needed Suppose the graph has 3 more edges Here we will stop, although … cache: … e5,6 Æe4,6 e4,5 x2 x0 x4 x1 x5 x3 x6 Open problem: constrain simple contradictory cycles in P time Technion

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