University Of Central Florida Department Of Computer Science The CRAY-1 Computer System

1. University Of Central Florida Department Of Computer Science The CRAY-1 Computer System Presented By: Hatim Boustique Summer 2003

2. Content • Characteristics of Cray 1 • Computation Section • Software • Comparison and Evolution • Conclusion

3. Cray Seymour Created in 1976

5. The Cray-1 consists of : • The CPU mainframe • A power Cabinet • A Maintenance Control Unit ( MCU) • One or more Disk Systems • An interface to a front-end computer

6. Basic Computer System

7. Characteristics of Cray 1 Cont. COMPUTATION SECTION • 12.5 nanosecond clock period • Scalar and vector processing modes • Twelve fully segmented functional units • Vector ,Scalar and Address registers • Four instruction buffers of 64 16-bit parcels each • 128 Instruction codes

8. Characteristics of Cray 1Cont. MEMORY SECTION • Up to 1,048,576 words of bi-polar memory (64 data bits and eight error correction bits) • sixteen banks of 65,536 words each • Four-clock-period bank cycle time

9. Characteristics of Cray 1 Cont. INPUT/OUTPUT SECTION • 12 input channels and 12 output channels • Channels are grouped ( 1 group = 6 channels ) • Channel groups served equally by memory (scanned every four clock periods) • Channel priority resolved within channel groups • Lost data detection

10. Computation Section

11. Computation Section consists of • Instruction Control Network • Operating registers • Functional Units ( Or pipelined Units) • Instruction buffers

13. Computation Section ( cont.)Instruction format Example: Arithmetic operations gh : operation code i : the result register j and k : the two operand registers

14. Computation Section ( cont.)Operating registers • V Registers for Vector processing • 8 V registers ( 1 V Register = 64 elemt) ( 1 Element = 64 bits) • Suited for vector quantities ( i.e. rows/columns of matrices) • Used for vector chaining M E M O R Y

15. Computation Section ( cont.)Operating registers Example of Chaining DO I = 1, 64 D(I) = A(I) * B(I) + C(I)

16. Computation Section ( cont.)Operating registers - S Registers for Scalar processing • 8 S-registers ( 1 Register = 64 bits) • Source and destination for scalar arithmetic • Furnish one operand in vector instructions

17. Computation Section ( cont.)Operating registers • A Registers ( Address ) • 8 24-bit registers Primarily for - Memory references Also for • Loop control • Channel I/O operations

18. Computation Section ( Cont. ) Functional Units • Hardware organizations • Each implements a portion of the Instruction Set • 12 independent functional units = parallelism • grouped into • Vector units • Floating point • Scalar units • Address units

19. Computation Section ( Cont.) Functional Units

20. Computation Section ( Cont. ) Functional Units

21. Software • Cray Operating System (COS) — up to 63 jobs in a multiprog. Environment • Cray Fortran Compiler (CFC) — optimizes Fortran IV (1966) for the Cray-1 Automatically vectorizes loops that manipulate arrays

22. Front-end computer Any computer, such as a Data General Eclipse or IBM 370/168

23. Comparison with HP9000/735

24. Evolution Of Cray

25. Conclusion To which category of architectures The Cray 1 Computer does belong ? Load – Store Parallel functional units Pipeline processing

26. References - Russell, R. M., "The CRAY-1 Computer System", Communications of the ACM, (21) 1, January 1978, pp. 63-72 - Cray-1 Computer System Hardware Reference Manual 2240004By CRAY RESEARCH, INC. 1976.