1 / 34

UCT Software-Defined Radio Research Group

UCT Software-Defined Radio Research Group. UCT SDRRG Team. UCT Faculty: Alan Langman Mike Inggs Simon Winberg PhD Students: Brandon Hamilton MSc Students: Bruce Raw Gordon Inggs Simon Scott Joseph Wamicha. UCT Software-Defined Radio Research Group. Current CASPER Hardware. BEE2.

tyrell
Download Presentation

UCT Software-Defined Radio Research Group

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. UCT Software-Defined Radio Research Group

  2. UCT SDRRG Team • UCT Faculty: • Alan Langman • Mike Inggs • Simon Winberg • PhD Students: • Brandon Hamilton • MSc Students: • Bruce Raw • Gordon Inggs • Simon Scott • Joseph Wamicha UCT Software-Defined Radio Research Group

  3. Current CASPER Hardware BEE2 ROACH ROACH 2 *Disclaimer: Alan made me include this slide

  4. Current Software =

  5. Need for low-cost solution • Great boards and (relatively) easy-to-use toolchain • But expensive, so not accessible to smaller research groups • Lack of HPC skills in South Africa • Low-cost h/w and s/w solution needed • Enlarge CASPER community

  6. Requirements • Low cost hardware • Simple design rather than low performance • Open-source software • Easy to learn and use • Compatible with existing h/w and s/w • Target software-defined radio apps

  7. Proposed Solution • Similar to existing CASPER hardware (FPGA + processor) • Xilinx Spartan-6 FPGA • Sufficient performance for most apps, but lower cost • TI ARM Cortex-A8 processor • Large support community • FPGA Mezzanine Card (FMC) connector • Python-based toolchain

  8. Throw them all in a pot…

  9. Mix them up…

  10. And you get a Rhino!

  11. Rhino Architecture 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video 2x 128MB DDR2 SDRAM 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  12. Xilinx Spartan-6 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video • Xilinx XC6SLX150T • 676-pin package • 150 000 logic cells • 180 DSP48A1 slices (up to 300MHz) • 8 GTP transceivers • 4 integrated DDR3 Memory Controller Blocks 2x 128MB DDR2 SDRAM 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  13. DDR2 SDRAM • Micron DDR3-1066 • 512MB capacity • 25.6Gbps total bandwidth 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video 2x 128MB DDR2 SDRAM 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  14. FMC ADC/DAC Connectors 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video 2x 128MB DDR2 SDRAM • FMC connectors for ADC and DAC cards • Support 2 cards 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  15. CX4 10Gbps Ethernet 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video 2x 128MB DDR2 SDRAM • 2 CX4 10Gbps ethernet connectors • Supports copper-to-fibre adaptors 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  16. TI AM3517 ARM Cortex-A8 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video • Texas Instruments AM3517ZCN • 491-pin package • 600 MHz ARM Cortex-A8 core • Many integrated peripherals (e.g. USB, Ethernet, HD video port) • OS and drivers available 2x 128MB DDR2 SDRAM 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  17. DDR2 SDRAM 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video • Winbond DDR2-800 • 256MB capacity • 10.6 Gbps 2x 128MB DDR2 SDRAM 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  18. NAND Flash Memory 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video 2x 128MB DDR2 SDRAM • 256MB NAND flash memory • Mainly for OS • Can store bitstreams too 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  19. USB and SD Card 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video • ARM can boot off USB drive or SD card • 2 USB host ports • JTAG over USB 2x 128MB DDR2 SDRAM 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  20. 100Mbps Ethernet 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video 2x 128MB DDR2 SDRAM • 100Mbps ethernet for control • Supports IEEE1588 PrecisionTime Protocol • Sync boards within 10ns 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  21. FPGA-Processor Bus 2x 256MB DDR3 SDRAM USB, SD Card, 100Mbps Ethernet, audio and video 2x 128MB DDR2 SDRAM • 16-bit data bus • 1.3Gbps 256MB NAND Flash 2x FMC Connectors 2x CX4 (10Gbps ethernet)

  22. FPGA Mezzanine Card (FMC) • ANSI/VITA 57.1 standard • Low-pin count: • 160 pin • 34 differential data pairs, 2 high-speed serial pairs • 2 (+4) clocks, I2C, JTAG • High-pin count: • 400 pin • 80 differential data pairs, 20 high-speed serial pairs • 4 (+9) clocks, I2C, JTAG

  23. Why we chose FMC • Well-specified standard • electrical interfaces, mechanical and thermal requirements • Dedicated I2C lines for control • Lots of commercial off-the-shelf ADC/DAC cards • FMC-to-ZDOK+ adaptor for CASPER cards

  24. 4DSP FMC103 • 4 channel ADC • 210MSPS • 12-bit

  25. Curtis Wright ADC512 • Dual channel ADC • 3 GSPS • 8 bit

  26. CERN FmcAdc100M14b4chb • 4 channel ADC • 105 MSPS • 14 bit • Open-hardware

  27. Optimise cost+performance • Spartan-6 rather than Virtex-6 • 512MB DDR3, rather than QDR • 2x 10Gbps links • Total cost under $1500 • Training/research platform

  28. The PCB Spartan-6 and DDR3 SDRAM FMC Connectors ARM and DDR2 SDRAM Back-panel Connectors Power Supplies

  29. The Rhino Hide FMC to ZDOK+ adaptor FMC ADC/DAC Card katADC *Also build desktop enclosure

  30. The Toolchain Design system in Python (MyHDL) Python script MyHDL compiler Python script Synchronous dataflow model Verilog/VHDL GNURadio block Mathematical validation IP cores, VHDL blocks Xilinx synthesis tools Bitstream (bof file)

  31. The Runtime Environment Spartan-6 FPGA BOF file Data over high-speed network GNURadio block GNURadio frontend AM3517 ARM processor Control commands over 100mbps ethernet Rhino

  32. Other Applications • Bioinformatics • Financial predictions

  33. The Rhino Vision squish! squish!

  34. Thank you http://rrsg2.ee.uct.ac.za/rhino

More Related