Expansion Busses

1. A+ Core Unit4 Expansion Busses

2. The Expansion Bus Provides a method to add things not already there. Early PCs had very little built in. IBM Designed the PC to be expanded.

3. Expansion Bus Implementation • Expansion Bus connects to CPU through the ChipSet • ISA uses Southbridge • PCI usually uses Northbridge. • AGP uses Northbridge

4. Expansion Bus Speed • Expansion busses need a clock. • Some may use the System Clock. • May use an expansion bus crystal.

5. Expansion Bus and System Resources • Expansion Busses use System Resources to communicate with cards.

6. Expansion Bus Primary Characteristics Speed Data Width Connection Technology Direct Switched Packet Connector

7. The Original PC Bus • 8-bit bus • Top speed of 4.77 MHz • Speed was pushed to 8.0 MHz • IBM allowed competitors to copy bus design with NO fee.

8. ISA-16 • Compatible with ISA-8 • Same speed, just adds 8-bits • 8-bit cards fit into original slot and operate at 8-bits. • 16-bit cards use the additional baby connector.

9. MCA Bus • 32-bit ISA replacement • Bus Mastering (allows a card to control the bus) • Self-configuring Cards • Designed by IBM • 10.33 MHz • Proprietary Design led to few sales

10. EISA Bus Created by “The Gang of Nine” in response to IBM’s Proprietary MCA The Gang of Nine: AST, Compaq, Epson, Hewlett-Packard, NEC, Olivetti, Tandy, Wyse and Zenith “Compatible with ISA” ISA cards fit in EISA 32-bit, Self Configuring, but tied to 8MHz ISA Frequency

11. EISA Connector

12. VL-Bus Video Electronics Standards Association (VESA) Local Bus (Local == System) Designed with 80486 Hooks Added 2 connectors to an ISA-16 slot 32-bits wide, 33 MHz or even faster No Bus Mastering or Self-configuring cards Became obsolete with PCI and Pentium

13. VL-Bus Connector

14. Peripheral Component Interconnect AKA PCI Originally designed at 32-bits/33 MHz PCI 2.1 Spec allows 64-bit/66 MHz PCI Bus design integrates well with other busses (i.e. plays well with other busses)

15. PCI Performance Burst Mode: Very little setup allows multiple transfers Uses FIFO technology to store addr/data Bus Mastering Expansion Cards can “control” the bus Arbitration is used to ensure no one locks up the bus (Not even the CPU)

16. PCI Connectors PCI-X Connector PCI Connector

17. Accelerated Graphics Port AGP Direct Connection to Northbridge Problems with Video on PCI 132MB/sec MAX Throughput Connection shared and arbitrated with other PCI expansion cards

18. AGP Development • AGP 1.0: 1996 32-bit, 3.3 V, 1X,2X • AGP 2.0: 1998, 1.5 V, 1X, 2X, 4X • AGP 3.0: 2000, 1.5 V, 1X, 2X, 4X, 8X

19. AGP Connectors

20. AGP Safety Connector Attempting to put a 3.3V AGP Card in a 1.5V Slot

21. PCI-X • NOT the same as PCI-Express • Developed by IBM, HP and Compaq NOT Intel • 64-bit Slot running at 133MHz = 1GB/s

22. PCI-Express Provides Point-to-Point Connections Scalable 1x (250MBs) , 2x, 4x, 8x, 16x “Serial” Bus: 2.5Gbps(/lane) Full Duplex Uses Low Voltage Differential Signaling Signal must be terminated (with 100Ώ) Uses a “Network-like” protocol to frame data on the bus

23. Low Voltage Differential Signaling • PCI Express Frame

24. PCI Express Throughput

25. PCI Express Connectors