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FMD: Silicon multiplicity detectors

FMD: Silicon multiplicity detectors. Thermal simulation meeting, CERN, 11 November 2002 Børge Svane Nielsen Niels Bohr Institute. Geometry of FMD, T0 and V0 detectors Material constants for FMD Heat dissipation of FMD. FWD detectors layout. Si1, T0_r & V0_r layout. Si2 layout.

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FMD: Silicon multiplicity detectors

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  1. FMD: Silicon multiplicity detectors Thermal simulation meeting, CERN, 11 November 2002 Børge Svane Nielsen Niels Bohr Institute Geometry of FMD, T0 and V0 detectors Material constants for FMD Heat dissipation of FMD Børge Svane Nielsen, NBI

  2. FWD detectors layout Børge Svane Nielsen, NBI

  3. Si1, T0_r & V0_r layout Børge Svane Nielsen, NBI

  4. Si2 layout Børge Svane Nielsen, NBI

  5. Si3, T0_l & V0_l layout Børge Svane Nielsen, NBI

  6. CERN maquette 1:1 ITS-pixels V0-R T0-R Si1(outer) Si1 (inner) Absorber Børge Svane Nielsen, NBI

  7. FMD ring layout Full FMD = 3 inner rings + 2 outer rings Inner: Rin=4.2 cm Rout=17.2 cm Outer: Rin=15.4 cm Rout=28.4 cm 128 256 20x2x128=5120 10x2x256=5120 Børge Svane Nielsen, NBI

  8. Si1 assembly Si detectors Read-out electronics card on support plate back side Support plates Børge Svane Nielsen, NBI

  9. Hybrid with Viking chips Connector(s) for power, control, read-out • Hybrid cards contain: • FE chips • Bias voltages distribution • Gate/strobe distribution • Read-out clock distribution • Detector bias connection Other components • Read-out cards contain: • Bias voltages generation • Gate/strobe distribution • Read-out clock generation • Remote connections VA preamp+shaper: 128 ch Si detector Børge Svane Nielsen, NBI

  10. FMD Material constants Material type and thickness of one Si detector ring: Børge Svane Nielsen, NBI

  11. FMD Material constants Material type and thickness of one Si detector ring: Total thickness of one Si ring: C: 5.2 · 10-3I 1.8 · 10-2X0 Al: 5.1 · 10-3I 2.4 · 10-2X0 Børge Svane Nielsen, NBI

  12. FMD electronics FMD channel count Note: We are looking into increasing the number of strips, but use more integrated FE chips - red values. In the following, I assume the new numbers. Børge Svane Nielsen, NBI

  13. Heat dissipation Heat dissipated by FE electronics of one Si detector ring: VA1TA preamp chip (128 channels): 150 mW  80 chips = 12 W / ring For simulation: assume uniform distribution on hybrid surface (towards support plate) Read-out electronics and power distribution:  5 W / ring For simulation: assume concentrated in 2 locations near outer radius Børge Svane Nielsen, NBI

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