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ARMv8/aarch64 Linux driver porting for Synopsys DesignWare IP (USB3, GMAC…)

Linaro ARMv8 Linux driver porting for Synopsys DesignWare IP Power & performance analysis for big.LITTLE. Software development with Synopsys Virtualizer virtual prototypes. ARMv8/aarch64 Linux driver porting for Synopsys DesignWare IP (USB3, GMAC…).

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ARMv8/aarch64 Linux driver porting for Synopsys DesignWare IP (USB3, GMAC…)

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  1. Linaro ARMv8 Linux driver porting for Synopsys DesignWare IP • Power & performance analysis for big.LITTLE Software development with Synopsys Virtualizer virtual prototypes ARMv8/aarch64 Linux driver porting for Synopsys DesignWare IP (USB3, GMAC…) Creation Use • Model Library: • IEEE SystemC TLM-2.0 component • models, configurable subsystems • ARM Cortex:A57, A15, A7, A9 , M & R series (FastModels) • DesignWare USB2,USB3,GMAC,MMC, I2C, MIPI-UFS, MIPI-CSI • Other: Tensilica, Arterisetc. Batch Control for deterministic debug and profiling scenarios Automated creation of device trees from virtual prototype configurations • DS-5, Lauterbach, GDB: • Complemented with VP enabled system wide debugging views Fully scriptable System-wide control and inspection VirtualPrototypeAssembly Tools Pre-hardware power analysis for big.LITTLE/DVFS with elastic scenarios Virtual Prototype Simulation (Intel Windows/Linux hosts) User added Power Model Overlay Component Modeling Tools Linaro Linux andFilesystems Power Analysis Android DW Drivers Linux Device Tree Blob • http://www.synopsys.com/Systems/VirtualPrototyping • DesignWare IP Software Prototyping: http://tinyurl.com/lya4sck • ARM-based Android hardware-software design using VPs: http://tinyurl.com/leevd7s Run on Intel hosted 32bit/64bit Linux & Windows platforms. Not restricted to any specific IP vendor. Libraries include ARM, ARC, Tensilica, Arteris models etc. Any TLM-2.0 standard compliant model can be integrated.

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