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Effective and proven Verification Methodology for OCP-Based Systems Matteo Martinelli CDNLive! 2005 – SANTA CLARA (USA) - SEPTEMBER 2005. A Comprehensive Approach for OCP-based SOCs Verification g a b r i e l e z a r r i – verification engineer. Outline. The Company.
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Effective and proven Verification Methodology for OCP-Based Systems Matteo Martinelli CDNLive! 2005 – SANTA CLARA (USA) - SEPTEMBER 2005 A Comprehensive Approach for OCP-based SOCs Verification g a b r i e l e z a r r i – verification engineer y o g i t e c h / DATE06 – Munich - March 2006
Outline y o g i t e c h / DATE06 – Munich - March 2006
The Company y o g i t e c h / DATE06 – Munich - March 2006
Products and Services y o g i t e c h / DATE06 – Munich - March 2006
yogitech and OCP-IP y o g i t e c h / DATE06 – Munich - March 2006
OCP-based SoCs y o g i t e c h / DATE06 – Munich - March 2006
Major challenges in verifying SoCs y o g i t e c h / DATE06 – Munich - March 2006
OCP MASTER IP PCI DMA IP CPU OCP INTERCONNECT OCP CHECKER MEM CTRL DSP IP IP IP OCP SLAVE VERIFICATION IP Verification environment architecture y o g i t e c h / DATE06 – Munich - March 2006
eVerification Components: Design & Validation Flow y o g i t e c h / DATE06 – Munich - March 2006
OCP 2.1 eVerification Component (eVC) Database of Sequences OCP MASTER Configuration parameters OCP SLAVE OCP MONITOR Configuration parameters Sequence driver Protocol Checker RAM BFM BFM Coverage y o g i t e c h / DATE06 – Munich - March 2006
OCP 2.1 eVC: Highlights y o g i t e c h / DATE06 – Munich - March 2006
OCP 2.1 eVC: Main Features y o g i t e c h / DATE06 – Munich - March 2006
OCP 2.1 eVC: Configuration /1 y o g i t e c h / DATE06 – Munich - March 2006
OCP 2.1 eVC: Configuration /2 y o g i t e c h / DATE06 – Munich - March 2006
OCP 2.1 eVC: Predefined Sequences generation Directed BURST sequence • Instantiate in the MAIN sequence • Reuse existing sequences (RESET,BURSTCMD, IDLE) • Use objection handling routines y o g i t e c h / DATE06 – Munich - March 2006
Bus monitor including Protocol checker Bus monitor including Protocol checker DUT MASTER AGENT SLAVE AGENT OCP OCP OCP eVC SLAVE OCP eVC MASTER OCP 2.1 eVC: Module Level Verification /1 y o g i t e c h / DATE06 – Munich - March 2006
Bus monitor including Protocol checker Bus monitor including Protocol checker DUT OCP MASTER PORT STIMULUS GENERATOR OCP SLAVE PORT STIMULUS GENERATOR COLLECTOR OCP OCP OCP 2.1 eVC: Module Level Verification /2 y o g i t e c h / DATE06 – Munich - March 2006
OCP 2.1 eVC MASTER C TESTS CVL IP PCI DMA IP CPU OCP INTERCONNECT OCP 2.1 eVC MONITOR & CHECKER OCP 2.1 eVC MONITOR & CHECKER MEM CTRL IP DSP IP MEM OCP 2.1 eVC SLAVE e Verification Environment OCP 2.1 eVC: System Level Verification y o g i t e c h / DATE06 – Munich - March 2006
Dynamic vs Static Verification Dynamic approach allows functional verification and usage at any level of the design process (module, sub-system and top level) Static approach is useful at first stage of module development but strictly related to the number and quality of the defined assertions (no real functional verification) y o g i t e c h / DATE06 – Munich - March 2006
Verification results y o g i t e c h / DATE06 – Munich - March 2006
Compliance Flow A compliance flow needs three main deliverables: • The definition of an objective way to measure the protocol coverage, i.e. a set of Coverage Elements (soon delivered by FVWG) • The definition of a set of rules that each transaction on the bus should fulfill, i.e. a Table of Checks (already delivered by FVWG) • The definition of guidelines for generation of a Compliance Coverage Suite FULLY RANDOM GENERATION (EASILY OBTAINED WITH SOME VERIFICATION METHODOLOGIES) FEW DIRECTED TESTS y o g i t e c h / DATE06 – Munich - March 2006
Roadmap y o g i t e c h / DATE06 – Munich - March 2006
Conclusions y o g i t e c h / DATE06 – Munich - March 2006