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Using OCP Transactors for Module Level Verification October 2004

Using OCP Transactors for Module Level Verification October 2004. Mark Peryer Program Manager MENTOR CONSULTING. Test Bench Structure. Performance Analysis. Performance Profile Database. Seamless CVE TM. HW Simulation Design Verification. SW Execution Code Debug.

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Using OCP Transactors for Module Level Verification October 2004

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  1. Using OCP Transactors for Module Level VerificationOctober 2004 Mark Peryer Program Manager MENTOR CONSULTING

  2. Test Bench Structure

  3. Performance Analysis Performance Profile Database Seamless CVETM HW Simulation Design Verification SW Execution Code Debug Coherent Memory Server

  4. OCP Transactors ‘C’ CodeCompiled to execute on workstation Seamless Co-Verification Environment Module UnderTest SW Debugger OCPTransactor OCP BusClk

  5. OCP Transactors • Conform to OCP-IP 2.0 • Available as Master, Slave, Master/Slave • Perform all styles of OCP bus transaction • Bus Parameters and bus behaviour is configurable via file that uses OCP definitions: • Address/Data Widths • Burst Length • Endian

  6. The Software Model: High Level API Read/Write Functions Interrupt Handling Low Level API Atomic OCP actions Toggle this line Sample this signal The Hardware Model: Signal pins connected to HW OCP Interface Behaves like an OCP Master or Slave Delay file for bus timing Multiple Instantiations Separate clocks per instantion OCP Transactor in 2 Dimensions

  7. OCP Transactor in CoSim Environment • ‘C’ code is compiled for Host Code Execution • Executes on a workstation • Three approaches to driving the transactor: • Multiple threads • Synchronised via shared memory • Single Thread • Transactions are blocking - i.e. Sequential • Hybrid of the two • Multiple Single Threads

  8. Multiple Threads Transactors run parallel threads. They synchronise through semaphores using shared memory VHDL Test Bench ‘C’Verification Code OCP Transactor Shared Memory ‘C’Verification Code OCP Transactor

  9. Single Thread Transactors run in oneexecution thread. A new transaction cannot startuntil the previous one completes VHDL Test Bench ‘C’Verification Code (Single File) OCP Transactor OCP Transactor

  10. Hybrid Approach ‘C’Verification Code VHDL Test Bench OCP Transactor OCP Transactor Shared Memory ‘C’Verification Code OCP Transactor

  11. Many possibilities….. • Parallel Execution threads can verify some interesting conditions: • Multiple accesses • Multiple Processor System interactions • For a complex module (Multi CPU): • Split CPU, DSP and DMA accesses into different threads • Synchronise between threads as/if necessary • For a simple module (One CPU) • Single thread, multiple OCP Interfaces

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