Jared Casper, Ronny Krashinsky, Christopher Batten, Krste Asanović
A Parameterizable FPGA Prototype of a Vector-Thread Processor. Jared Casper, Ronny Krashinsky, Christopher Batten, Krste Asanović MIT Computer Science and Artificial Intelligence Laboratory, Cambridge, MA, USA. Vector Execution Unit. Control Proc. Lane 0. Lane 1. Lane 2. Lane 3. VRU.
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