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Preamp (PRE) Boom Electronics Board (BEB) EFW-EMFISIS E-Field I/F (EFW-EMF) John Bonnell Jane Hoberman, Michael Ludlam Space Sciences Laboratory University of California, Berkeley. EFW – PRE, BEB, EFW-EMF Outline. Motivation Biasing, Floating Grounds, and all that. Preamp
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Preamp (PRE) Boom Electronics Board (BEB) EFW-EMFISIS E-Field I/F (EFW-EMF) John Bonnell Jane Hoberman, Michael Ludlam Space Sciences Laboratory University of California, Berkeley EFW INST+SOC PDR
EFW – PRE, BEB, EFW-EMFOutline • Motivation • Biasing, Floating Grounds, and all that. • Preamp • Boom Electronics Board (BEB) • EFW-EMFISIS E-Field Interface (EFW-EMF) • Test Plans • For Each: • Performance requirements. • Block Diagram or Schematic • Layout • Status EFW INST+SOC PDR
EFW – PRE, BEB, EFW-EMFMotivation (In Words) • The EFW Sensors, Preamp, BEB and EFW-EMFISIS interface represent the primary analog signal path for E-field measurements on RBSP. • Measuring 0.1 mV/m DC E-fields required accuracies of 0.1% in the magnetosphere: • tens of mV of signal in the presence of tens to hundreds of mV/m of effective common-mode or systematic noise (photocurrents, SC charging), or tens of volts of common mode signal. • Non-linear coupling (I-V curve) of EFW sensors to E-field can be optimized through current biasing (factor of 100 decrease in susceptibility to systematic error sources and density fluctuations). • Current biasing of sensors drives volts to tens of volts floating potential differences between sensors and SC ground. • High effective source impedance (plasma sheath, ten of MΩ), and low-noise and low-leakage current requirements (systematic error reduction again) drive use of low-voltage preamps in floating ground configuration. • Deflection and collection of stray photoelectron currents prior to impingement upon sensor also reduces DC biases (WHIP/USHER and GUARD surfaces). EFW INST+SOC PDR
EFW – PRE, BEB, EFW-EMFMotivation (In Pictures) Sensor I-V curve and sheath impedance Sensor and SC Floating Potentials SC Sensors photoelectrons ambient e- photo e- plasma e- EFW INST+SOC PDR
EFW – PRE, BEB, EFW-EMFPerformance Requirements • Formal requirements presented in SysEng presentation. • Informally: • Measure few tenths of mV/m to few hundreds of mV/m 2D DC E-fields associated with global convection, ULF waves, and shock-driven effects (spin plane). • Measure few few mV/m to few hundreds of mV/m 3D DC E-fields (spin plane and spin axis) associated with same. • Measure 3D E-field fluctuations up to a 6 kHz at amplitudes up to hundreds of mV/m associated with energetic electron acceleration, scattering and transport. • Deliver low-noise analog E-field signals to EMFISIS-WAVES from 10 Hz to 400 kHz to allow for measurement of tens of mV/m E-field fluctuations associated with energetic electron acceleration, scattering, and transport, as well as detection of the upper hybrid line for cold plasma density estimation. • Measure SC potential fluctuations associated with quasi-DC and low-frequency plasma density and fluctuations. • These measurement requirements drive the design of the Preamp, the Boom Electronics Board (BEB) and EFW-EMFISIS E-Field interface. EFW INST+SOC PDR
EFW – Preamp EFW INST+SOC PDR
EFW – Preamp SPB Schematic EFW INST+SOC PDR
EFW – Preamp AXB Schematic EFW INST+SOC PDR
EFW – Preamp Response Model • Sheath impedance is Rs || Cs, and connects to SPHERE. • Output load is Cc || (Rc + RL), connected to Vout. EFW INST+SOC PDR
EFW – Preamp Frequency Response • Confirmed via test using THEMIS=EFI Flight Spare Pre and prototype RBSP-EFW 50-m cable, Nov 2007. EFW INST+SOC PDR
EFW – Preamp Enclosures SPB AXB fine wire usher surface OP-15 and rad shield • SPB enclosure directly derived from THEMIS-EFI (20 units on-orbit 19 months); minor modifications to accommodate DDD-mitigation caps. • AXB enclosure is AXB sensor (spherical shell). • Includes 7-mm Al equivalent 4π radiation shields around OP-15. OP-15 and rad shield guard surface SPB cable Whip (Stub or Usher) Hinge (Guard) Sphere EFW INST+SOC PDR
EFW – Preamp Layouts • SPB and AXB Preamp PWB layouts derived directly from THEMIS-EFI, with minor modifications to accommodate DDD-mitigation capacitors, as well as different mounting and packaging of AXB units. • Board material is Thermount (Arlon 85NT), to minimize differential CTE over broad temperature ranges: • -135 C to + 90 C; THEMIS-EFI experience. • -150 C to +70 C; RBSP-EFW CBE. SPB AXB EFW INST+SOC PDR
EFW – Preamp Contribution to DC Error Budget • Contribution of preamp to DC error budget is negligible: • worst case NTE DC errors are 24 mV (SPB) and 48 mV (AXB). • OP-15 VOS and IBIAS contribute < 3 mV at BOL and over temperature (THEMIS-EFI). • OP-15 is 100-krad(Si) part, but increases in VOS and IBIAS values and fluctuations noted at the 40-60 kRad(Si) TID, leading to enhanced shielding design (7-mm Al-equivalent; ≈20 krad(Si) mission dose [MDR Dose-Depth Model]) [UniSys Report PPM-98-008 (1998)]. EFW INST+SOC PDR
EFW – Preamp AC Error Budget (Noise and Sensitivity) • EFW sensitivity requirement (S/N = 1) marked in DASHED RED. • EMFISIS E-field buffer sensitivity requirement (S/N =1) marked in SOLID RED. • Most likely conducted noise source (THEMIS-EFI experience) is floating supply switching frequency, which is out-of-band (450 kHz; dashed blue line). EFW INST+SOC PDR
EFW – Preamp Dynamic Range and Design • Goal of 400 mV/m at up to 6 kHz (driver is recent observations of large-amplitude narrowband whistler mode waves in inner magnetosphere). • Testing at 24 Vpp (equivalent to 40 Vpp with nominal AC gain of 0.6) using THEMIS-EFI Flight Spare preamps. • Driver for increase in floating supply voltage (±10 to ±15 V). EFW INST+SOC PDR
EFW – Preamp DDD Testing and Mitigation • adding necessary 350-mil Al equivalent shield to SPB and AXB preamp enclosures drove MOI and stability ratios. • adding > 0.1 nF DDD-mitigation caps to preamp input would severely attenuate AC response. • All pins of OP-15 tested in both powered and unpowered state: • 1000 pulses, 10-pF capacitor, +/- 1500 V [as per RBSP EMECP]. • Only susceptible pins were COMP inputs: • Addition of DDD-mitigation caps from COMP inputs to FGND. • Connection of N/C pin to FGND (no floating conductors allowed). • Impacts on performance: • to be tested, Sep-Oct 2008; not expected to impact performance. EFW INST+SOC PDR
EFW – Boom Electronics Board (BEB) EFW INST+SOC PDR
BEB Requirements • Functional Requirements • Spin Plane and Axial Booms and Sensors, for each provide: • Floating Ground Driver • “Bias”, “Guard”, “Usher” programmable potentials with readback. • AC test signal source • Changes from THEMIS-EFI Design: • Increase in FGND range from ±100 V to ±225 V. • Deletion of DBRAID driver. • DAC commanding moved off-board (DCB function). • ACTEST generation moved off-board (DCB function); switching maintained. • Accommodation of EFW-EMFISIS E-Field I/F Buffers. • Allowance for “Solo-BEB” contingency operation. EFW INST+SOC PDR
BEB Requirements, con’t. • Preamp Signal Characteristics: • DC Voltage Level: ±185 Vdc wrt. AGND. • AC Dynamic Range: • 200 Vpp wrt. AGND (<100 Hz). • 26 Vpp wrt. FGND (>100 Hz). • Bandwidth: DC – 400 kHz. • Floating Ground Driver Specification: • Input: Preamp Output Signal (V1..V6). • Input Filter: 300 Hz (3 dB). • Output Dynamic Range: ±185 Vdc wrt. AGND. • Output: references Preamp floating power supply (±15 Vdc wrt. FGND). • Opposing booms matched to 0.1% accuracy. • Bias, Usher, Guard Specification: • Reference Input: Preamp Output Signal (V1..V6). • Reference Input Filter: 300 Hz (3 dB). • Output Dynamic Range: Vref±40 Vdc wrt. AGND. • full-scale DAC → Vref + 40 Vdc. • DAC Resolution: 1 nA or 10 mV (12-bit DAC provides XXX nA) • Opposing booms matched to 0.1% accuracy (BIAS only). • DAC step response: better than 10 ms (matches typ. Sensor response). • Parts: • Selection, Derating, Radiation, Gen’l Specs: as per RBSP EFW PAIP and Matrix. EFW INST+SOC PDR
EFW – BEBFunctional Block Diagram EFW INST+SOC PDR
EFW BEBPreliminary PWB Layout (1) • THEMIS-EFI BEB with modifications: • Maintain front panel and backplane connector layout. • remove DBRAID Driver. • remove FPGA and ACTEST buffers. • Accommodate smaller transistors and larger caps. • Accommodate EFW-EMF buffers along front side. EFW INST+SOC PDR
EFW BEBPreliminary PWB Layout (2) REVISED EFW INST+SOC PDR
EFW – BEBMechanical Assembly • BEB and EFW-EMF I/F is loaded at top of IDPU chassis. • EMI shield between bottom of BEB and top of DFB. EFW INST+SOC PDR
EFW -- BEBDesign Status • BEB Breadboard • 225-V Bias and (FGND) designs verified. • Preliminary DC gain and AC response measured. • Engineering Model • BEB schematic update complete: • Trace sizing and spacing for 225-V design. • Parts stress analysis complete. • PWB board layout in progress: • Initial placement complete. • Layout to be completed by early Sep 2008. • Parts testing: • See summary at end of section. EFW INST+SOC PDR
EFW – EMFISIS-EFW E-Field I/F EFW INST+SOC PDR
EFW – EFW-EMFISIS E-Field I/F Design Requirements [EFW to EMFISIS Interface ICD] … Subsection 2.2.3 EFW TO EMFISIS EFW will provide to EMFISIS buffered analog probe voltage difference signals for three orthogonal pairs of electric field sensors. Over the frequency range from 10 kHz to 400 kHz, these signals will have a 100 dB (TBR) dynamic range evaluated over a bandwidth of 1 Hz and a sensitivity of 3·10-17 (V/m)2/Hz (TBR) at 100 kHz for the two spin plane components. Over the frequency range from 10 Hz to 12 kHz, there shall be a 100 dB (TBR) dynamic range evaluated over a bandwidth of 1 Hz and a sensitivity of 3·10-14(V/m)2/Hz (TBR) at 1 kHz for the two spin plane components. For the axial component signals, these requirements shall be reduced by a factor of 100 in sensitivity and 20 dB in dynamic range. The maximum magnitude of the measured signals for all components to be handled by the interface shall be 50 mV/m at 1 kHz. EFW INST+SOC PDR
EFW – EFW-EMFISIS E-Field I/F Block Diagram • Differential buffers for each of the three axes of E-field measurements. • Differential signal and reference ground sent via shielded twisted pair in the EFW-to-EMFISIS harness to the EMFISIS-WAVES package. EFW INST+SOC PDR
EFW – EFW-EMFISIS E-Field I/F Schematic • 10-Hz high-pass RC filter on input. • Precision resistors and trim capacitors to achieve 40 dB AC CMRR. • Requirement for DDD-mitigation capacitor on output TBD (analysis/test required). EFW INST+SOC PDR
EFW – PRE, BEB, EMF Parts Selection and Testing EFW INST+SOC PDR
EFW – PRE, BEB, EMF Functional Testing • Preamp: • Board-Level Functional Tests (DC and AC gain, offset, phase; Input impedance, VOS, IBIAS; power). • Thermal Qualification and Acceptance (as required). • BEB: • Board-Level Functional Tests (DC and AC response: gain, offset, phase; DAC commanding, gain, and offset; Analog HSK readback; power). • EFW-EMFISIS I/F: • Board-Level Functional Tests (AC Response: gain, phase, offset; AC CMRR; power). • Integrated EFW IDPU ETU conducted noise tests. • EFW-EMFISIS combined ETU noise testing. Significant Reuse of THEMIS GSE and Procs. EFW INST+SOC PDR
EFW – PRE, BEB, EFW-EMF BACKUP SLIDES EFW INST+SOC PDR
EFW – Preamp Biasing and Frequency Response Impact of Bias on Frequency Response Model; THEMIS-EFI (SPB, red; AXB, green). EFW INST+SOC PDR
EFW -- BEBFloating Ground Driver • Design Heritage: • CRESS, FAST, Polar, CLUSTER, THEMIS. • Changes in parts driven by 225-V design: • 2N3439, 2N5416 → STX83003, 2SA1627. • Higher voltage capacitors on feedback, filters. EFW INST+SOC PDR
EFW -- BEBGeneric Bias Circuit (bias, usher, guard) • Design Heritage: • CRESS, FAST, Polar, CLUSTER, THEMIS. • Changes in parts driven by 225-V design: • 2N3439, 2N5416 → STX83003, 2SA1627. • Higher voltage capacitors on feedback, filters. EFW INST+SOC PDR