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EEL 3801

EEL 3801. Part II System Architecture. Components. Video Display Terminal – self explanatory Keyboard – self-explanatory Disk Drives – self-explanatory System Unit – contains the motherboard or the system board . Otherwise self-explanatory. Components (cont.).

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EEL 3801

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  1. EEL 3801 Part II System Architecture EEL 3801C

  2. Components • Video Display Terminal – self explanatory • Keyboard – self-explanatory • Disk Drives – self-explanatory • System Unit – contains the motherboard or the system board. Otherwise self-explanatory EEL 3801C

  3. Components (cont.) • Random Access Memory (RAM) – Electronic memory where the program and the data are kept while the program is running. It is volatile since the contents are lost if there is loss of power. Additionally, it is also called dynamic since its contents must be continuously refreshed. EEL 3801C

  4. Components (cont.) • Read-Only Memory (ROM) BIOS – Contains the information on the input output peripherals. • CMOS RAM – Keeps system setup information. • Expansion slots – Permit expansion of the system by adding special purpose boards such as modems, communication cards, etc. EEL 3801C

  5. Components (cont.) • Power Supply – Self-explanatory • Parallel Port – Output port that transfers a set of bits simultaneously. Typically used for printers. Allow for quick transfer of data but only for short distances. • Serial port – Output port where single bits are produced one by one. Slower, but useful for longer distances. EEL 3801C

  6. Components (cont.) • Microprocessor – Intel microprocessors are downwardly compatible with each othe. • Programs written on older versions will run on the newer ones, but programs written for the newer versions will not run on the older ones. • Read Section 2.1 of the textbook for more details. EEL 3801C

  7. System Architecture • The Central Processing Unit (CPU) is the most important part of the computer. It consists of the Arithmetic logic Unit (ALU) and the Control Unit (CU). • The ALU carries out arithmetic, logic and shifting operations. • The CU fetches data and instructions and decodes addresses for the ALU. EEL 3801C

  8. System Architecture (cont.) • Additionally, there may be a math coprocessor, which speeds up mathematical calculations, as well as many other support chips. However, they are all coordinated by the CPU. EEL 3801C

  9. The CPU • The most basic tasks of the CPU are: • Find and load the next instruction from memory. • Execute the instruction. This is composed of several sub-instructions that we will discuss later. EEL 3801C

  10. The CPU (cont.) • The CPU, besides the ALU and CU, is composed of several other components: • Data bus: Wires that move data within the CPU itself. • Registers: High-speed memory elements within the CPU itself on which can significantly speed up the performance of the computer. • Clock: A timing device whose ticks coordinate all individual operations that take place in the computer. These ticks are called machine cycles. EEL 3801C

  11. Registers • Registers are special work areas inside the CPU that can store data and/or instructions. • These memory elements are very fast. • There are several registers on the Intel 8088 family of microprocessors: • Data registers • Segment registers • Index registers • Special registers • Flag register EEL 3801C

  12. Data Registers • Also called general purpose registers. • Are used for arithmetic and data manipulation operations. • Can be addressed as either 8 or 16 bit values, or as both. • The 80386 and newer CPU’s use 32-bit registers addressable as 16-bit ones. EEL 3801C

  13. Data Registers (cont.) • There are several of these. • The AX Register: the accumulator register is used by the CPU for arithmetic operations. • It is a 16-bit register, but can be addressed as two independent 8-bit registers called AH (for high) and AL (for low). EEL 3801C

  14. Data Registers (cont.) • The BX Register: the base register is also general purpose (like the AX). • Has the ability to hold addresses for other variables (pointers). • Also 16-bit that can be independently addressed as two 8-bit bytes (BH and BL). EEL 3801C

  15. Data Registers (cont.) • The CX register: the counter register best serves as the counter for repeating looping instructions. • These instructions automatically repeat and decrement the CX register, and quit when it equals 0. • Also 16-bit that can be independently addressed as two 8-bit bytes (CH and CL). EEL 3801C

  16. Data Registers (cont.) • The DX Register: the data register is also general purpose but has a special role when doing multiplication or division. EEL 3801C

  17. Segment Registers • These registers are used to store memory locations of either instructions or data in main memory. • These registers contain the base segment of the memory location – where the memory segment begins. EEL 3801C

  18. Segment Registers (cont.) • There are several of these: • The CS Register: the code segment register contains the base location of the executable instructions that make up the program. • Note that the base location can only address the initial location where these instructions can be found, not the entire segment.. EEL 3801C

  19. Segment Registers (cont.) • The DS Register: the data segment register is the default base location in memory for variables • The SS Register: the stack segment register contains the base location of the run-time stack. • The ES Register: the extra register is an additional memory location where additional base locations can be stored. EEL 3801C

  20. Index Registers • Contain the offset (the distance from the base segment) where a specific variable or instruction may be found. The base segment and the offset can uniquely identify any addressable location of any length in memory. Base segment + offset = memory location. EEL 3801C

  21. Index Registers (cont.) • There are several of these: • The SI Register: the source index takes name from the instruction used to move strings. • SI usually contains an offset from the DS register, but can address any variable. EEL 3801C

  22. Index Registers (cont.) • The DI Register: generally acts as a destination for string movement instructions. Typically contains an offset for the ES register, but not necessarily so. • The BP Register: the base pointer register contains an offset from the stack register (SS). • Used to locate variables in the stack. EEL 3801C

  23. Special Registers • Do not fit into any other categories. • The IP Register: the instruction pointer register contains the offset of the next instruction to be executed. • Combines with CS to form the complete address of the next executable instruction. EEL 3801C

  24. Special Registers (cont.) • The SP Register: the stack pointer register contains the offset from the beginning of the stack segment to the top of the stack. • SS and SP combine to form the complete address for the top of the stack. EEL 3801C

  25. Flags Register • One single 16-bit register whose individual bit positions serve as flags to indicate the status of the CPU or the result of some arithmetic operation. • The individual positions are predefined, although not all 16 are defined. EEL 3801C

  26. Flags Register (cont.) • Bit positions and flags: • 0  Carry flag: Set when result of unsigned arithmetic operation is too large to fit into destination. Values are 1=carry; 0=no carry. • 1  undefined • 2  Parity flag: reflects the number of bits that are set in the result of an operation. Can be even or odd. EEL 3801C

  27. Flags Register (cont.) • 3  undefined • 4  Auxiliary carry: set when operation causes a carry from bit 3 to bit 4. Rarely ever used. • 5  undefined. • 6  Zero flag: Set when result of an operation results in zero. Used in jumping to other instructions based on comparison of two values. Has a value of 1when 0; 0 when ~0. EEL 3801C

  28. Flags Register (cont.) • 7  Sign flag: Set when result of an operation results in negative number. Value is 1 when negative; 0 when positive. • 8  Trap flag: Determines whether or not the CPU will be halted after each instruction is executed. Allows Trace or stepping through a program’s execution. Allows the programmer to control the CPU in this way through the INT 3 instruction. EEL 3801C

  29. Flags Register (cont.) • 9  Interrupt flag: Makes it possible for external interrupts to occur. Interrupts can be disabled by setting this flag to 0. Controlled by the programmer through the CLI and STI instructions. • A  Direction flag: controls the assumed direction used by the string processing instruction. Values are 1=up; 0=down. Programmer can control this flag through the STD and CLD instructions. EEL 3801C

  30. Flags Register (cont.) • B  Overflow flag: Like the Carry flag, but for signed arithmetic operations. Value is 1=overflow; 0=no overflow. • C, D, E and F  undefined EEL 3801C

  31. The Run-Time Stack • The run-time stack is an important element in the execution of a stored program. • It is a temporary holding area for addresses and data. • It resides in the stack segment identified in the SS and SP registers. • Each “cell” in the stack is 16 bits. EEL 3801C

  32. Run-Time Stack (cont.) • The stack pointer holds the last element to be added or pushed into the stack. • This is also the first element to be taken off the stack, or popped. • This is referred to as Last-In-First-Out (LIFO). EEL 3801C

  33. The Run-Time Stack (cont.) • There are three typical uses for the run-time stack: • If we want to save the contents of a register, the stack makes a great place to store their values temporarily. EEL 3801C

  34. The Run-Time Stack (cont.) • When a subroutine is called from another part of the program, it is important that the processor return to the place where the function was called after it exits. The address of the instruction that called the subroutine is saved on the stack so as to be able to return to it later. EEL 3801C

  35. The Run-Time Stack (cont.) • Local variables can be created when a subroutine is active and then popped off the stack when the subroutine returns to the calling instruction. This is done in an area inside the run-time stack called the stack frame. EEL 3801C

  36. The Run-Time Stack (cont.) • Operations: • The push operation: Used to put values of data or instructions onto the stack. There is only on place in the stack into which things can be inputted – the top of the stack. mov ax,00A5 ; move 00A5 into AX push ax ; pushes content of ax into stack push bx ; assume BX has a value of 0001 push cx ; assume cx has a value of 0002 EEL 3801C

  37. 0006 00A5 0001 High memory 0002 SP Low memory The Run-Time Stack (cont.) • The push instruction does not change the value of the source register (typically the ax register, but could be others). Rather it simply copies its value to the top of the stack. EEL 3801C

  38. The Run-Time Stack (cont.) • The pop operation: Used to remove the value in the stack pointed to by the stack pointer and places it in a register or memory location (variable). Immediately upon removing the element popped, the SP moves to the immediately previous element in the stack. pop ax ; pops stack and puts value into AX EEL 3801C

  39. 0006 00A5 0001 High memory 0002 SP Low memory The Run-Time Stack (cont.) • Note that the value remains in the stack, but not being pointed by the stack pointer, it is subject to be overwritten by the next push operation. EEL 3801C

  40. Microinstructions • Machine level instructions are not the lowest level instructions in the computer. Microinstructions are. These are very low-level operations that carry out the machine-level instructions. EEL 3801C

  41. Microinstructions (cont.) • There are three basic ones: • fetch: the control unit fetches the instruction, copies it into the CPU (register). • decode: this operation decodes the instruction as well as any operands specified by the instruction. If any operands, the control unit fetches the operand from main memory. EEL 3801C

  42. Microinstructions (cont.) • execute: the ALU executes the operation and passes the result operands to the CU, where they are returned to the registers and/or to main memory. • Get next instruction • Go back to step 1 • Microcode is the interface between the binary code level and the electronic level. EEL 3801C

  43. Memory organization of DOS • The Intel 8086 processor can access 1 Mb of memory (actually, 1,048,576 bytes, which is FFFFF in a 20-bit address). This is called the Real Mode. • The main memory is divided into RAM and ROM. • RAM occupies low memory, and starts at 00000h and continues up to BFFFFh. EEL 3801C

  44. Memory organization of DOS (cont’d) • ROM occupies high memory and begins at C0000 and continues to FFFFF. • This is mostly used for the ROM BIOS (the hard disk controller). • The BIOS contains diagnostic and configuration software, as well as input-output subroutines. EEL 3801C

  45. Memory organization of DOS (cont’d) • Addresses begin with a hex address of 00000 and continue incrementally until FFFFF. • DOS allows only the first 640kB of RAM to be used for programs. • This is misleading because DOS (74kB) itself has to occupy this area as well. • Remaining RAM used by video display and hard disk controller. EEL 3801C

  46. System Memory (cont.) • The 80286 and more notably, the 80386 and 80486 processors can run in Protected Mode. • This means that they can radically increase the amount of memory they can address (16MB). EEL 3801C

  47. System Memory (cont.) • The Pentium can address significantly more than that. • Unfortunately, DOS can only run in real mode. • However, Windows runs in protected mode and liberates the programmer from the 1MB memory limit. EEL 3801C

  48. System Memory (cont.) • The 80386 and beyond processor also has the virtual 8086 mode, which allows concurrent real mode processes to be executed in by a single CPU. • The total memory being used can total more than the available RAM. The processor uses external memory (hard disk drive or floppy) to page currently unused portions of the program to these devices. EEL 3801C

  49. Address Calculations • An address is a number that refers to an 8-bit (byte) memory location. • The addresses are numbered consecutively, starting at 00000h and going up to the highest location in memory, depending on the amount of memory available. EEL 3801C

  50. Address Calculations (cont.) • Addresses can be expressed in one of two ways: • A 32-bit (16 + 16) segment-offset address. This combines a base location (the base segment) with the offset to represent the actual address. For example, 08F1:0100, where 08F1 is the base location (segment) from which to start counting, and 0100 is the offset, or how much to count. The address points to the first byte in the address. EEL 3801C

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