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Problems Mixing C and ASM. From DP256reg.asm: ADR04H: EQU REGBS+$98 ;ADC result 4 register ;Retrieve ATD Results from Channel 0 ldd ADR0DR0H ;Reads A= ATD0DR0H B= ATD0DR0L anda #$03 ;Because ATD result is 10-Bit resolution From ICC12’s hcs12dp256.h:
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Problems Mixing C and ASM From DP256reg.asm: ADR04H: EQU REGBS+$98 ;ADC result 4 register ;Retrieve ATD Results from Channel 0 ldd ADR0DR0H ;Reads A= ATD0DR0H B= ATD0DR0L anda #$03 ;Because ATD result is 10-Bit resolution From ICC12’s hcs12dp256.h: #define ATD0DR0H _P(0x90) //*char #define ATD0DR0L _P(0x91) //*char #define ATD0DR0 _LP(0x90) //*short int r; r = ATD0DR0H & 0x0300; //Compiler won’t complain… //But what does it do?
Problems Mixing C and ASM #define ATD0DR0H _P(0x90) //*char #define ATD0DR0L _P(0x91) //*char #define ATD0DR0 _LP(0x90) //*short r = ATD0DR0H & 0x0300; This line produces this assembly code: ldab 0x98 clra anda #3 andb #0 Which does not have the intended effect at all! Instead, use this: r = ATD0DR0 & 0x0300; //A subtle difference, with a major effect
Problems Mixing C and ASM Similarly… From DP256reg.asm: ATD0STAT: EQU REGBS+$86 ;ADC status register hi *ATD0STAT EQU REGBS+$87 ;ADC status register lo brclr ATD0STAT, #$80, * ;This works… From ICC12’s hcs12DP256.h: #define ATD0STAT _LP(0x86) #define ATD0STAT0 _P(0x86) If bit 7 of the ATD status register is the conversion complete flag, what is the problem with this line: while(!(ATD0STAT & 0x80));
Problems Mixing C and ASM ATD0STAT is a 16-Bit Register. The Motorola manual only shows that 8-Bits at $86, and nothing at $87. From the Register Map in the Motorola Manual This is not the way ICC handles it. ICC defines $87 as a 16-Bit register, so attempting to apply an 8-Bit bit mask to this register, - say to 0x80 to check if conversion is complete - will not work. You must extend the bit mask to 16-Bits (i.e. 0x8000). Or, you may use ATD0STAT0, but you have to be aware that the name is different from the one Motorola uses. #define ATD0STAT _LP(0x86) //short #define ATD0STAT0 _P(0x86) //char