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EKT 221 : Digital 2 Serial Transfers & Microoperations. Serial Transfers & Microoperations. Serial transfers Used for “narrow” transfer paths Example : Telephone or cable line Parallel – to – Serial : at source Serial – to – Parallel : at destination Serial micro-operations
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Serial Transfers & Microoperations • Serial transfers • Used for “narrow” transfer paths • Example : Telephone or cable line • Parallel – to – Serial : at source • Serial – to – Parallel : at destination • Serial micro-operations • Example 1 : Addition • Example 2 : Error – Correction for CDs Serial Parallel Parallel Serial Source Destination
Serial Transfers & Microoperations • Serial mode in digital system: information in the system is transferred or manipulated one bit a time. • Information is transferred one bit at a time by shifting the bits out of one register and into a second register. • This transfer method is in contrast to parallel transfer, in which all the bits of the register are transferred simultaneously at the same time (during one clock pulse).
Serial Transfers • Serial mode info is transferred / manipulated one bit at a time • Serial transfer of information from Reg A to Reg B is done with shift registers
Serial Transfers • Serial output (SO) of Reg A connected with serial input (SI) of Reg B • SI of Reg A receives 0’s while data from Reg A are transferred to Reg B • Initial content of Reg B shifted out to its SO and lost
Serial Transfers • To maintain the data in Reg A, • connect SO of Reg A to its SI • Information is circulated back into Reg A
Serial Transfers • Shift determines when & how many times the registers are shifted • Clock pulse (Clock) can pass to shift register clock inputs C only when Shiftis HIGH (1)
Serial Transfers • Each shift register has four stages. • Shiftsignal must be designed for a fixed time of four clock pulses. • Shift in HIGH : Clock inputs C T1, T2, T3 and T4 • Shift in LOW : Clock inputs C HIGH Shift Reg disabled, shifts stop Shift Reg enabled, Shift occurs in both registers
Serial Transfers SI (A) = 0 Reg B = Previous value of Reg A
Serial Micro-operations • Serial addition is a low cost way to add large numbers of operands, since a “tree” of full adder cells can be made to any depth. • Other operations can be performed serially as well, such as parity generation / checking or more complex error – check codes. • Shifting a binary number left = multiplying by 2 • E.g sl 0100 1000 • Shifting a binary number right = dividing by 2 • E.g sr 0100 0010
Serial Adder – demonstrate the serial mode operation • The circuit shown uses 2 shift registers for operands • A (3:0) and B (3:0) • A full adder (FA), and one more FF (for carry) is used to compute the sum • Result (sum) stored in Reg A and final carry stored in FF
Serial Adder – demonstrate the serial mode operation SHIFT = 1 Result (sum) stored in Reg A Final carry stored in FF Both registers are shifted once to right Carry FF = 0
Serial Adder • SI of Reg B can receive new inputs • In each clock pulse/cycle : • New sum bit is transferred to Reg A • New carry transferred to FF • Both registers shifted once to the right • Process continues until Shift = 0
Analyzing the circuit : Serial Adder Example 1: Find value in Reg A after 4 shifts. Reg A : 1000 Reg B : 0101
Analyzing the circuit : Serial Adder ANSWER : 1101, after 4 clock cycle
Analyzing the circuit : Serial Adder Example 1: Find value in Reg A after 4 shifts. Reg A : 1011 Reg B : 0101
Analyzing the circuit : Serial Adder 1 is indicated in Cout ANSWER : 10000, after 4 clock cycle
Sin Sin A0 FA S0 B0 B0 A0 Reg B Reg A Cin A1 B1 A2 B2 S1 FA B3 A3 A1 B1 Sout Sout FA S2 A2 B2 FA S3 A3 B3 Cout Parallel Adder Can be the input for Reg A
Serial Vs Parallel Transfers • Space Vs Time Trade-off • Serial adder is a sequential circuit because it includes the carry from FF. But need n clock cycle to complete the addition (Less Space, more Time) • Parallel adder is a combinational circuit because it needs n FA for n bit operation. Need only one clock cycle to complete the addition. (More Space, less Time) • Gives the designer choice. • More Space – More cost • More Time – More delay (not fast)