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Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis

Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis. Fei Hu and Vishwani D. Agrawal Department of ECE, Auburn University, Auburn, AL 36849. Problem Statement. Enhance the probabilistic power estimation technique

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Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis

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  1. Enhanced Dual-Transition Probabilistic Power Estimation with Selective Supergate Analysis Fei Hu and Vishwani D. Agrawal Department of ECE, Auburn University, Auburn, AL 36849

  2. Problem Statement Enhance the probabilistic power estimation technique for signal correlations to improve the estimation of dynamic power and, in particular, account for glitch suppression by inertial delays. ICCD 2005, San Jose, CA

  3. Outline • Background • Probability waveform • Tagged probability waveform simulation (TPS) • Dual-transition glitch filtering (Dual-trans) • Present Contributions • Motivation • Supergate and timed Boolean function (TBF) • Modifications of TPS and Dual-trans • Using TBF • Adaptive application of supergate • Experimental results • Conclusions ICCD 2005, San Jose, CA

  4. Background: Probability Waveform Vector period Samples of signal, s(t) Transient interval Steady state time 0 Next input vector applied Input vector applied Transition probabilities 0.25 1.0 0.25 0.5 0.5 P(t) =0.25 P(t)=0.25 Prob. waveform, P(t) time 0 0.5 0.5 0.25 0.25 ICCD 2005, San Jose, CA

  5. Background: Tagged Probability Waveform • Partition of a probability waveform for one vector period according to the steady state signal values • Four tagged waveforms • Approximate exact spatial correlations with the macroscopic spatial correlations between steady state signal values (tags) • Reference: C.-S. Ding, et al., “Gate-level power estimation using tagged probabilistic simulation,” IEEE Trans. on CAD, vol. 17, no. 11, pp. 1099–1107, Nov. 1998. ICCD 2005, San Jose, CA

  6. Background: Dual-Transition Glitch Filtering Dual-transition probability: probability of joint event at two time instance t1 < t2 < t3 < t1+d Dual-transition glitch filtering TPS glitch filtering Actual waveform Reference: F. Hu, V. D. Agrawal, “Dual-Transition Glitch Filtering in Probabilistic Waveform Power Estimation,” Proc. GLSVLSI, 2005, pp. 357-360. ICCD 2005, San Jose, CA

  7. Motivation: Reconvergent Fanouts • Effectiveness of dual-transition glitch filtering is limitedby the underlying TPS method • The major sources of errors in TPS is its approximation of spatial correlation among signals ICCD 2005, San Jose, CA

  8. supergate a 1 b c 2 4 3 Supergate and TBF • Supergate • partitioning of circuits in a way that all inputs to a partition are externally independent • Limit to maximum 3 levels and 3 input, to avoid exponentially increased complexity • Reference: S. C. Seth and V. D. Agrawal, “A new model for computation of probabilistic testability in combinational circuits,” Integration, the VLSI Journal, vol. 7, pp. 49-75, 1989. ICCD 2005, San Jose, CA

  9. supergate a 1 b c 2 4 3 Timed Boolean Function • Need to use timed Boolean function (TBF) • Existence of multiple propagation delay paths inside a supergate • Assuming same gate delay  • state of node c determined by the values on inputs a and b at times t-2 and t-3. • Reference: E. J. McCluskey, “Transients in combinational logic circuits,” in Wilcox and Mann, editors, Redundancy Techniques for Computing Systems, Spartan Books, 1962, pp. 9-46. ICCD 2005, San Jose, CA

  10. Present Contributions • Reformulate TPS using timed Boolean functions (TBF). • Compute dual-transition probabilities using TBF • Reformulate the dual-transition probability • Approximate higher-order probabilities as function of dual-transition probabilities • This allows application of supergate structures for improving signal and transition probabilities. ICCD 2005, San Jose, CA

  11. Selective Application of Supergate • Motivation • TBF not accurate when inertial glitch filtering effect is not negligible • Inertial glitch filtering effect • The glitch filtering by internal gates of a supergate ICCD 2005, San Jose, CA

  12. Selective Application of Supergate • Static decision making • Quick analysis based on the time instances subject to glitch filtering D = average number of time instants requiring glitch filtering • Apply supergate if D> DT (inertial filtering negligible) • DT, experimentally determined threshold (0.9) ICCD 2005, San Jose, CA

  13. Experimental Results – Fanout Delay Assignment ICCD 2005, San Jose, CA

  14. Experimental Results – Unit Delay Assignment ICCD 2005, San Jose, CA

  15. Conclusions • Effectiveness of dual-transition glitch filtering method is limited by the underlying probabilistic simulation method • Proposed an enhanced dual-transition power estimation method: • Incorporates supergate to handle the spatial correlation at reconvergent fanouts • Describes supergate by timed Boolean function • Uses selective application of supergate when inertial glitch filtering effect is negligible • Improved estimation accuracy over previous approaches (TPS and DualTrans) • The average estimation error of total power is now less than 5% for ISCAS’85 benchmark circuits ICCD 2005, San Jose, CA

  16. Questions ? For questions and comments, please contact hufei01@auburn.edu

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