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Floorplanning

Floorplanning. Professor Lei He lhe@ee.ucla.edu http://eda.ee.ucla.edu/. Given , for each block B i Area of B i w i h i =A i Aspect ratio of B i (continuous or discrete) Connectivity

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Floorplanning

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  1. Floorplanning Professor Lei He lhe@ee.ucla.edu http://eda.ee.ucla.edu/

  2. Given , for each block Bi • Area of Bi wihi=Ai • Aspect ratio of Bi • (continuous or discrete) • Connectivity • Determine: for each block • location (xi,yi), and • dimension (wi, hi) • min • total area • interconnections w £ £ i s r i i h i 5 3 11 7 2 4 10 Problem Formulation

  3. Slicing floorplan 5 1 3 6 2 4 7 Slicing Floorplan and General Floorplan v h h 1 v 2 v 4 7 3 h 5 6 Slicing Tree non-slicing floorplan

  4. Overview of This Chapter • Module orientation problem • Slicing floorplan design • Non-slicing floorplan design • student presentation

  5. 1 2 3 4 7 6 5 m1 m7 m7 m7 Area Utilization • Area utilization • Depends on how nicely the rigid modules’ shapes are matched • Soft modules can take different shapes to “fill in” empty slots • Floorplan sizing m3 m3 m1 m1 m2 m2 m4 m4 m6 m6 m5 m5 m7 m7 Area = 20x22 = 440 Area = 20x19 = 380

  6. V L R H T B Slicing Floorplan Sizing • Bottom-up process • Has to be done per floorplan perturbation • Requires O(n) time (N is the # of shapes of all modules) bi bi+ yj max(bi, yj) ai bi yj xj ai yj ai+ xj xj max(ai, xj)

  7. 3 1 2 4 5 7 6 1234567 17x16 167 2345 9x15 8x16 m3 m1 67 1 234 5 9x7 8x11 m2 m4 8x8 7x5 6 7 2 34 m6 4x11 m5 m7 4x7 5x4 4x8 3 4 4x5 3x6 Slicing Floorplan Sizing • Simple case: all modules are hard macros • No rotation allowed, one shape only

  8. Slicing Floorplan Sizing • General case: all modules are soft macros • Stockmeyer’s work (1983) for optimal module orientation • Non-slicing = NP complete • Slicing = polynomial time solvable with dynamic programming • Phase 1: bottom-up • Input: floorplan tree, modules shapes • Start with sorted shapes lists of modules • Perform Vertical_Node_Sizing & Horizontal_Node_Sizing • When get to the root node, we have a list of shapes. Select the one that is best in terms of area • Phase 2: top-down • Traverse the floorplan tree and set module locations

  9. a1 a2 a3 5x5 6x4 4x6 A B b1 b1 b1 b1 a1 a2 a3 2x7 6x7 7x7 8x7 a1 a2 b2 b2 b2 b2 a3 3x4 7x6 8x5 9x4 b3 a1 a2 4x2 8x6 9x5 10x4 a3 b3 b3 b3 Sizing Example

  10. Stockmeyer Algorithm Procedure Vertical_Node_Sizing Input: Sorted lists L = {(a1, b1), ... , (as,bs)}, R = {(x1, y1), ... , (xt, yt)}, where ai < aj, bi > bj, xi < xj, yi > yj (for all i < j) Output: A sorted list H = {(c1, d1), ... , (cu,du)}, where u ≤ s + t - 1, ci < cj, di > dj (for all i < j) Begin H := Ø i := 1, j := 1, k = 1 while (i ≤ s) and (j ≤ t) do (ck, dk) := (ai + xj, max(bi, yj)) H := H U {(ck, dk)} k := k + 1 if max(bi, yj) = bi then i := i + 1 if max(bi, yj) = yj then j := j + 1

  11. Complexity of the Algorithm • n= # of leaves = 2 * # of modules • d=depth of the tree • Running time= O(nd) • Storage = O(n) • because, at depth k, • sum of the lengths of the lists =O(n) • time to construct these lists =O(n) • configurations stored at this node can be release as soon as the node is processed • Extension • Each module has k possible shapes • Running time and storage O(nkd) depth k

  12. Floorplan using Simulated Annealing • References • 1. D.F. Wong and C.L. Liu • A New Algorithm for Floorplan Design • 23rd IEEE/ACM Design Automation Conference 1986, • P101-107 • 2. D.F. Wong and C.L. Liu • Floorplan Design for Rectangular and L-shaped modules • ICCAD-87 P520-523 • 3. D.F. Wong, H.W. Lceng, C.L. Liu • Simulated Annealing for VLSI Design • Kluwer Academic Publishers 1988 P31-71

  13. Basic Ingredients for S.A. • Solution space • Neighborhood Structure • Cost Function • Annealing Schedule

  14. Representation of Solutions 4 6 2 7 1 3 5   + + + 1 6 7 4  2 3 5 16+35 2+74+  

  15. Corresponding Slicing Tree May Not Unique 3   4 1 2  4  1 + + 4 1 3 2 2 3 132+4 132+4 Normalization: do not allow following slicing trees +  +  ••• ++ ••• •••  •••

  16. Normalized Polish Expressions 16+35 2+ 74+  …….. = 7 …….. = 5 # of operands = 4 # of operators = 2 • Total length =2n-1 • Permutation of { 1, 2, …, n} and # of operators =n-1 • # of operators < # of operands at every position • No consecutive operators of the same type (due to normalization)

  17. Chain: +++….. or  ++…. 16+35 2+ 74+  chains The moves: M1: swap adjacent operands M2: Complement some chain of operators M3: swap 2 adjacent operand and operator Neighborhood Structure

  18. 5 3 1 2  3 + 4  5 + 4 1 2 M1 5 4 1 2  4 + 3  5 + 3 1 2 M3 3 5 4 1 2  4 + 3 5  + 2 1 M3 3 5 4 1 2  4 3 + 5  + 1 2 M3 5 4 3 1 2  4 3 5 +  + 1 2 M2 5 4 3 1 2 + 4 3 5 +  + 2 1 M2 2 5 3 1 2 + 4 3 5  +  1 4 Examples of Neighboring Solutions

  19. å y = + l w = + l A A d ( i , j ) c ( i , j ) Î ( i , j ) E c d å w = ij ij Cost Function : + + A 1 5 2 4  3  5 3 5 3 5 3 2 4 1 1 2 4 2 4 1 A=minimum area : W Wirelength:

  20. Computing cost function  4 +  2 6  4 9 + + 8 3 5 10 + 1  7  1 6 2 7 9 10 8 3 5 ³ ³ ³ x a , y b, x y A ³ ³ ³ ³ ³ ³ x a , y b x a , y b x a , y b i i i i or i i i i i i or ³ ³ ³ ³ x b , y a, x y A x y A ³ ³ x b , y a i i i i i i i i

  21. +  4  + + 3 5 1 6 +  2  9 10 8 7 Computing Cost Function(Cont’d)

  22. Floorplan is a very important step for design planning Floorplan may be performed before synthesis of each block (at RTL level) Slicing floorplan allows efficient representation and optimization Module orientation and sizing problem can be solved easily Good results using SA on Polish expression representation Recent progress non-slicing floorplanning via Sequence pair representation Floorplanning and system design co-optimization Summary

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