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د. بســام كحـالــه Dr. Bassam Kahhaleh. 22342. Computer Organization & Assembly Language. Chapter 2:. 22342 – Computer Organization & Assembly Language. Intel Architecture IA - 32. Intel Processors History. Register File. ALU. Microprocessor Architecture. M E M O R Y. Microprocessor.
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د. بســام كحـالــه Dr. Bassam Kahhaleh 22342 Computer Organization&Assembly Language
Chapter 2: 22342 – Computer Organization & Assembly Language Intel ArchitectureIA - 32
Register File ALU Microprocessor Architecture MEMORY Microprocessor Address Data
Modes of Operation • Real-Address Mode • 20-Bit Address (1 MB Memory) • 8/16-Bit Data • 8/16-Bit Registers • Protected Mode • Virtual Mode • System Management Mode
Real Mode Registers 8 Bits 8 Bits AccumulatorRegister AH AL AX BaseRegister BH BL BX CountRegister CH CL CX DH DL DivisionRegister DX
Real Mode Registers 16 Bits Source Index SI DestinationIndex DI Base Pointer BP Stack Pointer SP InstructionPointer IP
Real Mode Registers 16 Bits Code Segment CS Data Segment DS Extra Segment ES Stack Segment SS
Real Mode Memory Segmentation • Previous Microprocessors • 8-bit Data, 16-bit Address • 64 KByte Memory Space • Code Segment • Data Segment • Overlapping 0 0 0 0 0 ↓ 0 F FFF Byte 64 K 1 M 1 0 0 0 0 ↓ 1 F FFF 64 K
Real Mode Addressing • 64 KB Segmentation • 16-Byte Boundary Alignment • Seg:Offset Notation Example: 20 Bits Segment Register 0000 Offset + Memory Address
Flags • Status Flags • Carry (CF) • Overflow (OF) • Sign (SF) • Zero (ZF) • Auxiliary Carry (AC) • Parity (PF) • Control Flags • Direction, Interrupt, etc. - - - - OF DF IF TF SF ZF - AC - PF - CF
Intel 8086/8088 AH AL BH BL CH CL DH DL ALU Operations: ADD SUB MUL DIV INC DEC AND OR SI DI BP SP IP CS DS ES SS
x86 Assembly Language • Instruction Format • Mnemonic • One or More Operands • Machine Code • Assembly Statement • Label • Instruction • Comment Opcode Mode Operands Mnemonic Operands