FLCC Seminar Opportunities and Themes for The Next Four Years

1. FLCC SeminarOpportunities and Themes forThe Next Four Years Professor Kameshwar Poolla Mechanical Engineering Electrical Engineering & Comp Sciences University of California, Berkeley 510-520-1150 DFM

2. Inputs From … • Cadence, Mentor, Synopsys, KT, Marvell, AMD • FLCC Faculty • Will get more inputs in coming 2 months from • OEMS AMAT, LAM, Nikon, TEL, ASML… • Vertically integrated users Intel, IBM, … • Fabless Design houses Qualcomm, … • DfM/EDA Magma, Luminescence, … • Special thanks to: Luigi Capodieci, Roawen Chen, Nick Cobb, Nickhil Jakadtar, Eric Minami, Dipu Pramanik, Frank Schellenberg, Bhanwar Singh, John Stirnirman, Albert Wu DFM

3. The Next Four Years • Jan 2008 – Jan 2012 • Why do this? • Build on 8 years of success • Provide value to industrial partners • UC Discovery is a great leveraged funding source • The new proposal • Submit in October 07 • Need a brand new four proposal • Not just an extension • Evolutionary • Not a complete change • Must have continuity and stability for our University mission • Long-term interdisciplinary research DFM

4. The FLCC Team • What we bring to the Table: Expertise in • Process • New technologies • First principles modeling • Fundamental chemistry, physics • Metrology & control • Systems & Integration • What we will need to add: design, computation • Our “product” – great students, trained in the skills needed by our Industrial Partners DFM

5. The Target – 32 and 22 nm nodes • Expected technologies • Quadrupole/Quasar illumination • Immersion Litho • Phase-shift masks • Double patterning or Double exposure • Tools that will be necessary • DfM • Distributed Computation: parallel or cellular processors • Data mining • Statistical Learning methods • Modeling, Parameter estimation DFM

6. Three Problems • You don’t always get what you want • Interactions and The Radius of Influence • Time isn’t on your side DFM

7. What you ask for … DFM

8. What you get … DFM

9. You don’t always get what you want • Manufacturing cannot be modeled by rules • Partial solution – Design tools need a better predictive “model” of the manufacturing process • Model must be simple enough to run very, very fast • Link Manufacturing model upstream to EDA tools • Static timing, RC extraction, power/noise/area optimization • Example Research Problem:  Manufacturing model to predict to 1st order transistor geometry (only 1st order because full-chip simulation is too costly)  Software to extract BSIM compatible transistor model parameters based on predicted geometry  Parameters are used in SPICE [Ref: Poppe+Capodieci – non-rectangular transistor model] DFM

10. The Radius of Influence 90 nm 32 nm OPC/RET changes at center of red zone affects AD patterns across red area DFM

11. The Radius of Influence • OPC/RET will get even more computationally expensive • Intelligent use of these tools • Design rules will become extremely complex • Interactions across features • Interactions between layers • Interactions among processes • Partial solution – Filter through design & process • Concentrate on design-critical hotspots • Concentrate on process sensitive hotspots DFM

12. Iteration Cost Effectiveness of Iteration Cost of Iteration RTL $ Implementation $$ Signoff $$$ MFG Expected Volume Shipment $$$$ $$$$$$$ Schedule Delay $$$$$$$$$$$$$ Courtesy N. Jakadtar Actual Volume Shipment DFM

13. Time isn’t on your side • Design cycle iterations are expensive • Process models must be run very fast • Design rules are now 10,000+ pages! • Computation is becoming a bottleneck • Partial solution – stress scalability and computation in all aspects of our research DFM

14. Our Response • Five Inter-connected Research Themes • DfM • Modeling • Technology • MfD • Fundamental Studies DFM

15. Research Theme A – DfM • Developing new algorithms, paradigms, optimization methods to better incorporate manufacturing realities into design tools for 32 nm and 22 nm nodes • Key tools – OPC software, Pattern Matching • Sample projects • Model based dummy fill and assist feature optimization (lots of work done here already!) • Incorporate LWR in models for RET and upstream in EDA tools • Systematically incorporate impact of process variation on design • New approaches to DRC handling using combination of geometric design rules and pattern matching • Statistical circuit sizing • DfM implications for mixed-signal (wide open area) DFM

16. Research Theme B – Modeling • Develop a range of models of critical processes suitable across the design cycle for 32 nm and 22 nm nodes • Modeling • Must support a range of speeds & accuracies • Data driven • Process specific • Must assess model accuracy also • Empirical, parametric model • Model form comes from first principles • Target Processes/Effects • CMP, Etch, Mask, Flare effects in Litho, mask writing, 3D mask effects • Models for mask-less, APSM, immersion litho DFM

17. Models for a range of Accuracy & Speeds • With the Design • Increased model resolution for optimizing critical and sensitive paths • In Design Tools • Speed-accuracy trade-off to match abstraction level RTL Synthesis Speed Prototyping Accuracy Physical Synthesis Routing Nets/Paths Optimization Sign-off Regions Courtesy N. Jakadtar DFM

18. Modeling – Sample Research Projects • Etch Modeling for RET • OPC tools use a variable-threshold convolution kernel model • Can we build similar models for Etch? • Data driven Adaptive OPC Calibration • When minor process changes occur, use historical data to accelerate model calibration for OPC • Robust RET • RET optimization: minimize J(θ) • Objective function: J(θ) incorporates inaccurate process model • True objective J°(θ): || J(θ) – J°(θ) || < ε • How do modeling errors affect RET optimization? DFM

19. Modeling – Sample Research Projects • Effect of process window on static timing analysis in SPICE simulations, RC extraction, and across Design tools in general • Linking TCAD to SPICE [Synopsys] • Extract process dependent parameters in standard BSIM models • Use combo of data and TCAD tools • Model maintenance • Secure model sharing DFM

20. Research Theme C – Technology • Exploring new technologies and understanding existing technologies that could enable 32 nm and 22 nm nodes • Lithography • Double patterning, off-axis illumination, PSM, quadrupole illumination • Novel Transistor Fabrication Methods • Bulk Si transistor design to reduce performance sensitivity due to process induced variations (strain, dopant fluctuations, deep sub-λ litho) • Spacer litho defined gate electrodes for reduced sensitivity to LWR • New metrology opportunities • Damage and contamination inspection for masks/wafers DFM

21. Research Theme D – MfD • Optimizing Manufacturing based on Info from Design Tools for 32 nm and 22 nm nodes • Hotspot detection/filtering/classification • Metrology for Manufacturability • Where to measure Optimal metrology strategies (like AMDs Adaptive Dynamic Sampling) driven thru design filters and process sensitivity filters • When to measure Driven by drift models, process models, tool models using Kalman Filtering or other systems methods DFM

22. Research Theme E – Fundamental Studies • Understanding the fundamental aspects of critical processes that will enable 32 nm and 22 nm nodes • Theoretical understanding drives empirical, scalable model building for use in RET, and linking TCAD to EDA tools • Plasma Etch, CMP, Diffusion • Plasma surface interactions • Nano-scale etch profile shape evolution • MD tools to understand self-passivation through CF formation in etch • Chemistry and mechanics interactions at feature scale, parameterized by feature density for CMP DFM

23. Conclusions • This is an opportunity that must be seized • Learning opportunity for our Students • Challenging multi-disciplinary research opportunity for our Faculty • Collaborative long-term leveraged research opportunity for our Industrial Partners • Outstanding problems • Need to structure and organize our research efforts cohesively • So we work as a team, not as individuals • Need close interactions with and guidance from Industry to stay on focus • Need a title!! • Need your Feedback!! DFM