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Design and Implementation of VLSI Systems (EN1600) Lecture 31: Array Subsystems (PLAs/FPGAs). Prof. Sherief Reda Division of Engineering, Brown University Spring 2008. [sources: Weste/Addison Wesley – Rabaey/Pearson - Maxfield]. Using ROMs to implement logic. ROM (truth table). Inputs.
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Design and Implementation of VLSI Systems (EN1600) Lecture 31: Array Subsystems (PLAs/FPGAs) Prof. Sherief Reda Division of Engineering, Brown University Spring 2008 [sources: Weste/Addison Wesley – Rabaey/Pearson - Maxfield]
Using ROMs to implement logic ROM (truth table) Inputs Outputs In most designs, using ROMs can be extremely inefficient in terms of area
A Programmable Logic Array performs any function in sum-of-products form. Literals: inputs & complements Products / Minterms: AND of literals Outputs: OR of Minterms Example: Full Adder Programmable logic arrays
ANDs and ORs are not very efficient in CMOS Dynamic or Pseudo-nMOS NORs are very efficient Use DeMorgan’s Law to convert to all NORs NOR-NOR PLAs
PLAs are more flexible than ROMs No need to have 2n rows for n inputs Only generate the minterms that are needed Take advantage of logic simplification PLAs are popular for small-scale circuits that have 2-level implementations PLAs are not scalable to implement large designs PLAs vs. ROMS
Programmable logic blocks (lookup tables) Programming information could be stored in SRAM or FLASH 4-input LUT is the typical size
FPGA architecture Switch box
To implement in FPGAs, designs need to be decomposed and mapped to LBs Map to a LUT in a LB [Figure form Cong FPGA’01]
Programmable interconnects (global) Switch box
Offer flexibility → FPGAs can be reprogrammed to perform different logic functions No layouts, no masks, no custom fabrication → huge savings for low, med-volume production Larger overhead in area, performance, and power FPGAs versus custom chips