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FMD: Silicon detectors New ideas on electronics

FMD: Silicon detectors New ideas on electronics. FWD meeting, CERN, 17 September 2002 Børge Svane Nielsen Niels Bohr Institute. News from Si detector producers New ideas on read-out electronics Price update on FE electronics. FMD ring layout. Full FMD = 3 inner rings +

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FMD: Silicon detectors New ideas on electronics

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  1. FMD: Silicon detectorsNew ideas on electronics FWD meeting, CERN, 17 September 2002 Børge Svane Nielsen Niels Bohr Institute News from Si detector producers New ideas on read-out electronics Price update on FE electronics Børge Svane Nielsen, NBI

  2. FMD ring layout Full FMD = 3 inner rings + 2 outer rings Inner: Rin=4.2 cm Rout=17.2 cm Outer: Rin=15.4 cm Rout=28.4 cm 128 256 20x2x128=5120 10x2x256=5120 Børge Svane Nielsen, NBI

  3. Ring assembly Si detector FEE Hybrid Support Honeycomb? Børge Svane Nielsen, NBI

  4. Size limitations Inner segment Outer segment 145.81 mm 143.68 mm 150 mm wafer Hamamatsu: active max diameter 133.8 mm Micron: max 140 mm, but may extend beyond in 4 ”corners” ST: max 134 mm diameter  May be forced to some design modifications in 4 ”corners” Børge Svane Nielsen, NBI

  5. Price quotes Hamamatsu: design inner segment: 51.0 k€ 3 prototypes (inner): 11.8 k€ design outer segment: 51.5 k€ 3 prototypes (outer): 11.8 k€ production (100 pc): 154.8 k€ 280.9 k€ = 420 kCHF Micron Semiconductors: design inner segment: 15.0 k£ design outer segment: 15.0 k£ silicon masks: 10.0 k£ 10++ prototypes: 35.0 k£ production (100 pc): 100.0 k£ 175.0 k£ = 408 kCHF mounting & bonding: 50 k£ = 116 kCHF !! ST Microelectronics: For 500 m thick detectors: price indication: 600-700 $ per segment plus ”some” design cost Børge Svane Nielsen, NBI

  6. Cable function Segments (wafers) # lines Phi sectors Cable type Radial strips Hybrids # cables for inner ring Chips/ Hybrid # cables for outer ring FE Chips FE Channels FE controls 10 Shielded twisted pair 2 2 Si 1 inner 10 20 256 10 16 160 5,120 Analog data out 1 Shielded twisted pair 20 20 Si 1 outer 20 40 128 20 8 160 5,120 FE power 4 Shielded twisted pair 20 (or 10?) 20 Si 2 inner 10 20 256 10 16 160 5,120 Bias voltage 1 ?? 10 20 Si 2 outer 20 40 128 20 8 160 5,120 Si 3 inner 10 20 256 10 16 160 5,120 Total system 70 140 70 720 25,600 FMD electronics FMD channel count: Tentative FMD cable count: Børge Svane Nielsen, NBI

  7. Inner Si sensor VA-32 preamp+shaper 256 strips 2  sectors Connector Multiplexed read-out: 256 ch => 25 sec read-out time Børge Svane Nielsen, NBI

  8. Hybrid with Viking chips Connector(s) for power, control, read-out • Hybrid cards must contain: • VA chips • Power distribution/regulation • Gate/strobe distribution • Read-out control and clock • Monitoring • Bias voltage Other components • Read-out architecture choice: • 1. Analog signals to ”shoe-boxes” • (like SSD): long analog cables • ADC on/near hybrids (like TPC): • short analog, very long digital cables VA preamp+shaper: 32 ch Børge Svane Nielsen, NBI

  9. Reminder: VA architecture 32/64/128 input channels Analog mux out 10 MHz Strobe from LVL1 trigger Børge Svane Nielsen, NBI

  10. Analog read-out architecture Copy Belle or SSD: Disadvantages: Long cables with analog signals: need buffer amp Find space for ”shoe-boxes” Probably substancial modifications of HALNY modules DCS separate architecture Børge Svane Nielsen, NBI

  11. TPC FEE architecture http://ep-ed-alice-tpc.web.cern.ch/ep-ed-alice-tpc/ Børge Svane Nielsen, NBI

  12. ALTRO Layout and Package 2.5 m (ST) Data Memory 1K x 40 Processing Logic Børge Svane Nielsen, NBI

  13. ALICE TPC READOUT CHIP– Principle • 16-ch signal digitizer and processor • HCMOS7 0.25 m (ST) • area: 64 mm2 • power: 16 mW / ch • prototype delivery: Feb 02 • 300 samples fully tested • delivery of 40,000 chips: Dec 02 • cost: 5 SFr / ch Børge Svane Nielsen, NBI

  14. ALTRO Chip – ADC Resolution Integrated ADCbetter than external version! Børge Svane Nielsen, NBI

  15. FMD read-out based on ALTRO Can we use ALTRO as ADC in the FMD read-out, based on VA preamp-shaper chips ? • Yes, probably (needs some testing): • run one VA mux output into one ALTRO input at  10 MHz • use ALTRO as a pure ADC (forget the processor capabilities) • store event in ALTRO digital memory Advantages: Very short cables with analog signals ADC and event buffer directly on FMD detector Transmit digital data directly to DAQ We can make a simplified TPC read-out system DCS and trigger integral part of system Børge Svane Nielsen, NBI

  16. PASA – ADC – DIG. Detector Link (100 MB / s) (#216) TPC read-out architecture Each TPC Sector is served by 6 Readout Subsystems ON DETECTOR COUNTING ROOM Front-end bus (160 MB / sec) FEC 128 ch 25 RCU Data Compr. DDL - INT FEC 128 ch 2 BOARD CTRL Interface Slow-Control Controller Local Slow – Control (1 Mbit – serial link) FEC 128 ch 1 TTC-RX Local Slow- Control Serial link Overall TPC: 4356 Front End Cards 216 Readout Control Units Børge Svane Nielsen, NBI

  17. Detector Link (100 MB / s) (#216) New FMD read-out architecture Strongly inspired by TPC read-out, the FMD read-out could look like this: Each FMD (half)ring is separate Readout Subsystem VA ON DETECTOR COUNTING ROOM Analog serial link (10 MHz) Segment 256/512 ch “RCU” ALTRO. DDL - INT Segment 256/512 ch BOARD CTRL Interface Slow-Control Controller Local Slow – Control (1 Mbit – serial link) Segment 256/512 ch TTC-RX Local Read-out and Slow- Control link Overall FMD: 70 Segments (hybrid cards) 5 or 10 Readout Control Units Børge Svane Nielsen, NBI

  18. Read-out channel count We only need 1 ALTRO per ring to stay within 100 s read-out of TPC But: modularity suggests at least 1 RCU per half ring and: by adding more ALTRO in RCU, we get fast read-out Børge Svane Nielsen, NBI

  19. Electronics cost IDEAS: VA modification+prototype: 55 k€ VA production: 90 k€ ? hybrid design: 20 k€ hybrid production: 30 k€ ? test equipment: 10 k€ 205 k€ = 300 kCHF ”RCU”: board design and tests: in house - where? ALTRO chips: 5 k€ board production (10 pc): 10 k€ 16 k€ = 24 kCHF + design DAQ: RORC: ? other: ? DCS: power supplies: ? monitoring: ? Børge Svane Nielsen, NBI

  20. Conclusions Si strip sensors: • Si strip sensors are squeezed in 4 ”corners” by effective wafer size  cut some acceptance? • Quotations from 2 out of 3 known suppliers suggest price  400 kCHF • Need more quotes on mounting & bonding – could be > 100 kCHF Electronics: • FE electronics based on VA amplifiers still preferred • BE layout has developed towards a simplified version of TPC  proof of principle needed soon • Price of electronics estimated at 300 kCHF (FE) + 50 kCHF (BE) Børge Svane Nielsen, NBI

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