CPS110: Intro to memory

1. CPS110: Intro to memory Landon Cox February 14, 2008

2. Operating systems Applications System Calls Virtual Memory Threads Traps TLB, Page Tables Interrupts Atomic Test/Set OS Hardware

3. Remember what a process is • Thread • Stream of execution (unit of concurrency) • Project 1, first month of class • Address space • Memory space that threads use (unit of data) • Project 2, next two weeks of class

4. Address space abstraction • Address space • All memory data process uses to run • Program code, stack, data segment • Hardware  software • All processes share single small memory • OS  applications • Each process has its own large memory

5. Hardware, OS interfaces Applications Job 1 Job 2 Job 3 CPU, Mem CPU, Mem CPU, Mem OS Memory CPU Hardware

6. Illusions of the address space • Address independence • Can use same numeric address in 2 processes • Each process has its own version of “address 4” • Each “address 4” refers to different data items • Protection • One process cannot touch another’s data • Virtual memory • Address space can be larger than physical memory

7. Uni-programming • 1 process occupies memory at a time • Always load process into same spot • Must reserve space for the OS fffff (high memory) . . Operating system . 80000 7ffff . . User process 1 . 00000 (low memory)

8. Uni-programming • Virtual address • Address programmer thinks she’s accessing • Physical address • Address from the view of the machine • (actual physical memory location) • What is the V-to-P mapping in uni-progamming? • Identity map (virtual A  physical A)

9. Uni-programming • How to run another process? • Swap user process 1 to disk • Bring user process 2 to memory • Kernel scheduler swaps address spaces • (when doing a context switch) • This is how early PCs worked (badly)

10. Uni-programming • What features does this provide? • Address independence • Protection • No virtual memory • Note sum of address spaces > phys mem.

11. Uni-programming • Problems with uni-programming? • Swapping to/from disk is slow • Moves more data than might be needed • What does this imply about RR slice? • High overhead for swapping  large slice • Large slice  interactivity suffers

12. Multi-programming • More than 1 process in phys memory • Processes can have same virtual addrs • Cannot share physical addrs • Addresses must be translated • Statically: occurs before execution • Dynamically: occurs during execution • Protection is harder

13. Static address translation • Want two processes in memory • With address independence • Without translating on-the-fly • Must use static translation • Could you do this?

14. Static address translation • Adjust loads/stores when put in memory • This is called a linker-loader • Programming • Assume memory starts at 0 • Linker-loader • Adds 0x20000 to offsets for P2 • Similar to linking phase of compile fffff (high memory) . Operating system 80000 . 3ffff . . User process 2 . 20000 1ffff . . User process 1 . 00000 (low memory) load $1, $base + offset

15. Linking your programs • Compiler generates .o files + libraries • .o files all assume they start at address 0 • Linker puts everything together • Resolves cross-module references • (e.g. “how do I jump to thread_create?”) • Spits out single executable file

16. Multi-programming abstractions • Address independence? • Yes. (my address 4 is different from yours) • Protection? • No. • Why not?

17. Multi-programming protection • Static translation changes the offset • Process could still issue odd register value • Problem • Buggy/malicious code can corrupt other processes • User (not system) gets last move • Why do we need dynamic addresses? • To make pointers and arrays work load $1, $base + offset

18. Multi-programming features • Address independence? • Yes. (my address 4 is different from yours) • Protection? • No. • Why not? • Virtual memory? • No.

19. Multi-programming virtual memory • Virtual address space ≤ phys mem • Proof: static translation cannot provide VM • Each VA maps to a fixed PA • (one-to-one mapping) • Thus, # of VAs must equal # of PAs • (but we want more VAs than PAs) • Our goals require dynamic translation

20. Course administration • Project 1 • Due next Thursday • I am seriously worried … • If you haven’t started the library you are in trouble • Project 1 spec has been out for three weeks • Covered implementing threads/locks two weeks ago • Why have only two groups submitted so far?

21. Course administration • Extra office hours • Amre: Friday, 3-5 • Jason: Sunday, 5-7 • Me: Monday, 3-5 • Quinn: Monday, 6-8 • In addition to normal hours • Jason’s hours today moved to 8-10

22. Dynamic address translation User process Translator (MMU) Physical memory Physical address Virtual address Will this allow us to provide protection? Sure, as long as the translation is correct

23. Dynamic address translation User process Translator (MMU) Physical memory Physical address Virtual address This is an example of a systems service called “naming”. Can you think of other examples, that you use everyday? Internet DNS (Domain Name Service) File System (human-readable names to blocks on disk)

24. Dynamic address translation User process Translator (MMU) Physical memory Physical address Virtual address How does Java use naming to provide protection? What exactly is Java trying to protect (and from what)? Has programming in C++ changed your opinion of Java? Is it better to learn programming protected or not?

25. Dynamic address translation • Does this enable virtual memory? • Yes • VA only needs to be in phys mem when accessed • Provides flexibility • Translations can change on-the-fly • Different VAs can occupy different Pas • Common technique • Add level of indirection to gain flexibility

26. Hardware support • Traditional view • Dynamic translation needs hardware support • Agree or disagree? • Basic requirement • Must translate each load/store • Could do this via software simulation • JVM does a lot of the work of the MMU

27. Dynamic address translation • Translator: just a data structure • Tradeoffs • Flexibility (sharing, growth, virtual memory) • Size of translation data • Speed of translation User process Translator (MMU) Physical memory Physical address Virtual address

28. 1. Base and bounds • For each process • Single contiguous region of phys mem • Not allowed to access outside of region • Illusion own physical mem [0, bound)

29. 1. Base and bounds Looks a lot like the linker-loader. What is different? No rewriting. Every access goes through translator. (system gets the last move) Size of phys mem Base + Bound Bound Base 0 0 Virtual memory Physical memory

30. 1. Base and bounds • Translator algorithm • Only kernel can change base, bound if (virtual address > bound) { trap to kernel kernel can kill process with segmentation fault } else { physical address = virtual address + base }

31. 1. Base and bounds • What happens on a context switch? • Must translate addresses differently • Load translation data for new process • Set base and bounds registers

32. 1. Base and bounds • How can address spaces grow? • If memory above base+bound is free • Increase the bound • If memory above base+bound isn’t free • Stop program • Copy data • Change base and bounds • Restart process • Does being moved affect the program? • No, it still only knows about virtual addresses Base + Bound Base 0

33. Base and bounds pros and cons • Pros • Low hardware costs (2 registers, adder, comparator) • Fast (only inserting addition and comparison) • Cons • Single address space can’t easily exceed size of phys mem • Growing virtual address space might be slow • Sharing is difficult (must share all or nothing)

34. Base and bounds sharing Why can’t IE 1 and IE 2 share the same code segment? Size of phys mem Base + Bound Bound Bound Data Data Data Base Code Code Code 0 0 0 Virtual memory (IE 1) Physical memory Virtual memory (IE 2)

35. Base and bounds pros and cons • Pros • Low hardware costs (2 registers, adder, comparator) • Fast (only inserting addition and comparison) • Cons • Single address space can’t easily exceed size of phys mem • Growing virtual address space might be slow • Sharing is difficult (must share all or nothing) • Waste memory due to external fragmentation

36. Base and bounds fragmentation 1MB P4 P6 300KB 600KB P3 400KB P5 300KB P2 • External fragmentation • Heuristics to minimize • Best fit • (Allocate in smallest free region) • First fit • (Use first region that fits) 100KB P1 0 Physical memory

37. Base and bounds pros and cons • Pros • Low hardware costs (2 registers, adder, comparator) • Fast (only inserting addition and comparison) • Cons • Single address space can’t easily exceed size of phys mem • Sharing is difficult (must share all or nothing) • Growing virtual address space might be slow • Waste memory due to external fragmentation • Hard to grow multiple regions of memory

38. Base and bounds growth • What grows in a process? • The stack and heap New bound P1 frame stack frame P1 frame frame

39. Base and bounds growth • What grows in a process? • The stack and heap • How do you do this with both? • If heap grows, extend P1’s bound • If stack grows, must shift heap up • What about pointers into heap? heap heap heap P1 stack stack New data on heap at VA 100 (translated to PA 100+base) Store this address in a variable How can you shift VAs up? VA100 Problem: must fit two growing data structures in one contiguous region

40. Next class • Segmentation instead of base and bounds • Where “segmentation fault” comes from • Get serious about Project 1!