120 likes | 256 Views
Endcap Trigger Emulation. Xin Wang. Processing of ADC to L0 trigger decision. Raw ADC from DAQ file. 720 towers. FEE. 90 trigger patches. DSM0. 12 ‘half’ jet patches 0.3x1 or 0.6x1. DSM1. 2 endcap halves. DSM2.
E N D
Endcap Trigger Emulation Xin Wang
Processing of ADC to L0 trigger decision Raw ADC from DAQ file 720 towers FEE 90 trigger patches DSM0 12 ‘half’ jet patches 0.3x1 or 0.6x1 DSM1 2 endcap halves DSM2 6 channels from BARREL, each with 5-bit Esum To last DSM board
Endcap structure: towers -> trigger patches ->half jet patches ->endcap halves 9 10 8 12 7 11 2 6 5 1 3 4
HT 6-bit FEE Emulated from ADC Real trigger data Emu-Real difference 3% mismatch
TP 6-bit FEE Emulated from ADC Real trigger data Emu-Real difference mismatch
Etot ENERGY calculation from ADC & trig data BARREL ENDCAP Trig data ADC emul Trig data ADC emul Etot energy in DSM channels Etot energy in DSM channels Etotal (B+E) Barrel ~80% Etot (E+B) mismatch Trig data ADC emul Endcap ~7% Etot energy in DSM channels
Etot BIT calculation from ADC & trig data Emulated Real data Emu-Real difference
Conclusion • All L0-bits for ENDCAP can be emulated for M-C • Code verified against real events for DSM0,1,2 • More QA histos developed ported to online (PPlot) • Limitation: works for predefined time stamp (range)
1 2 DSM1
720 towers, each with 12-bit raw ADC from DAQ file FEE 90 trigger patches, each with 12-bit ADC( 6-bit TP + 6-bit HT) DSM0 12 DSM0 channels, each with 16-bit ( 9 or 10-bit TPsum, 2-bit HT, 2-bit TP, 2-bit HTTP) DSM1 2 DSM1 channels, each with 16-bit ( 5-bit Esum, 1-bit HTTPthr, 1-bit TPthr, 2-bit JP, 2-bit HT) DSM2 6 channels from BARREL, each with 5-bit Esum