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Faster Logic Manipulation for Large Designs

This paper discusses the use of disjoint-support decomposition (DSD) structures for efficient manipulation of millions of small Boolean functions in large hardware designs. A new DSD manipulation package is introduced, offering faster logic manipulation compared to existing methods.

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Faster Logic Manipulation for Large Designs

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  1. Faster Logic Manipulation for Large Designs Alan Mishchenko Robert Brayton University of California, Berkeley

  2. Outline • Motivation • Simple, local, iterative computation • Millions of 6-16 input functions (“small practical functions” = SPFs) • Runtime / memory / quality can be improved • Choosing the canonical form • Historic viewpoint • Disjoint-support decomposition (DSD) • DSD manager • Impact on computations • Experimental results • Statistics of DSD functions • Runtime improvements • Typical DSD structures • Conclusions

  3. Disjoint Support Decomposition • Primitive gates • Const0 • AND • XOR • PRIME • 2:1 MUX • Majority d e c a b f g h i k

  4. References • Canonical form • R. L. Ashenhurst, “The decomposition of switching functions”. Computation Lab, Harvard University, 1959, Vol. 29, pp. 74-116. • Computation from cofactors • V. Bertacco and M. Damiani, "Disjunctive decomposition of logic functions," Proc. ICCAD ‘97, pp. 78-82. • Computation from cofactors (corrections) • Y. Matsunaga, "An exact and efficient algorithm for disjunctive decomposition", Proc. SASIMI '98, pp. 44-50. • Alternative computations • T. Sasao and M. Matsuura, "DECOMPOS: An integrated system for functional decomposition," Proc. IWLS ’98, pp. 471-477. • S.-I. Minato and G. De Micheli, “Finding all simple disjunctive decompositions using irredundant sum-of-products forms”. Proc. ICCAD’98, pp. 111-117. • Boolean operations • S. Plaza and V. Bertacco, "Boolean operations on decomposed functions", Proc. IWLS ’05. • Applications in synthesis and mapping • A. Mishchenko, R. K. Brayton, and S. Chatterjee, "Boolean factoring and decomposition of logic networks", Proc. ICCAD'08, pp. 38-44.

  5. Timeline of (Canonical) Forms • Truth tables (TTs) (< 1980) • Sums-of-products (SOPs) (1980-1990) • Binary decision diagrams (BDDs) (1990-2000) • And-inverter graphs (AIGs) and truth tables (2000-2012) • Disjoint-support decompositions (DSDs) (> 2012) • For small practical functions (SPFs) only

  6. DSDs vs BDDs vs TTs for SPFs • TTs dominate BDDs in terms of memory and runtime • TTs and BDDs are equally (in)convenient for detecting Boolean properties • DSDs take less memory/runtime than BDDs/TTs for pratical functions of K inputs (8 < K < 16) • DSDs explicitly represent Boolean properties • Symmetry, unateness, NPN canonicity, decomposability, etc • Very important for practical applications!

  7. DSD Manager • Similar to BDD manager • Maintains canonical forms • Performs Boolean operations • Employs computed table • Different from BDD manager • Different data structure • Different normalization rules • More reusable computed table

  8. Primitives of DSD Manager • One constant 0 node • One primary input node n • Multi-input AND and XOR nodes with ordered fanins • Three-input MUX nodes • Multi-input PRIME nodes • Non-decomposable functions

  9. Canonicity of DSDs • Propagating inverters • AND(!a, !XOR(b, c))  AND(n, XOR(n, n)) • Collapsing operators • AND(a, AND(b, !AND(c, d))  AND(n, n, !AND(n, n)) • Ordering faninsof AND/XOR • Use support size • If there is a tie, AND precedes XOR precedes MUX precedes PRIME. • If there is a tie, a non-inverted fanin precedes a inverted fanin. • If there is a tie, the fanins’ fanins are ordered and compared in their selected order • If the recursive comparison fails to produce a unique order, the fanins’ DSD structures are isomorphic and therefore their order is immaterial. • Unifying variables • AND(a, XOR(b, c), MUX(d, e, f))  AND(n, XOR(n, n), MUX(n, n, n))

  10. Boolean Properties of SPFs(industrial benchmarks)

  11. Boolean Properties of SPFs(public benchmarks)

  12. LUT Structure Mapping Runtime

  13. Typical DSD Structures !a = NOT( a ) (ab) = AND( a, b ) [ab] = XOR( a, b ) <abc> = MUX( a , b , c )

  14. Conclusion • (Re)invented DSD • Canonical form, which exposes Boolean properties • Introduced a DSD package • An alternative to a BDD package for SPFs • Discussed preliminary experimental results • Exciting future work is waiting to be done!

  15. Abstract When logic transformations, such as circuit restructuring, technology mapping, and post-mapping optimization, are repeatedly applied to large hardware designs, millions of relatively small (6-16 input) Boolean functions have to be efficiently manipulated. This paper focuses on a novel representation of these small functions, in terms of their disjoint-support decomposition (DSD) structures. A new DSD manipulation package is developed, which allows for faster logic manipulation compared to known methods.

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