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8-Bit Binary-to-Gray Code Converter. Mike Wong Scott Echols Advisor: Dave Parent May 11, 2005. Agenda. Abstract Introduction Why Simple Theory Back Ground information Summary of Results Project (Experimental) Details Results Cost Analysis Conclusions. Abstract.
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8-Bit Binary-to-Gray Code Converter Mike Wong Scott Echols Advisor: Dave Parent May 11, 2005
Agenda • Abstract • Introduction • Why • Simple Theory • Back Ground information • Summary of Results • Project (Experimental) Details • Results • Cost Analysis • Conclusions
Abstract • 8-Bit Gray Code Converter • Operates at 200 MHz • Uses 5.65 mW of Power • Occupies an area of 346x154 mm2
Introduction • To convert a series of 8 binary numbers into Gray Code. • Used in digital communication. • When counting, only one bit is changed. • Effect of error minimized. • Uses the basic principles learned in EE166.
Introduction • Truth Table: XOR Logic
Longest Path Calculations Note: All widths are in microns and capacitances in fF
Cost Analysis • Time spent on each phase of the project • verifying logic – 1 week • verifying timing – 1 week • layout – 2 weeks • post extracted timing – 1 day
Lessons Learned • Use DRC often for the layout. • Consult with Dr. Parent when needed. • Start early and don’t procrastinate. • Smaller groups are easier to manage.
Summary • Incorporated many of the principles taught in EE166. • Designed a circuit that converts binary coded numbers to the Gray Code. • Implemented logic design into layout form of CMOS technology.
Acknowledgements • Thanks to: • Cadence Design Systems for the VLSI lab • Synopsys for Software donation. • Professor Parent.