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Bundled-Data Datapaths. Problems random standard cell layout mixed control + datapath timing analysis required robustness of design reduced Possible Solutions DI codes hybrid bundled + DI simpler timing analysis. DI Codes. Dual Rail (used in 1st Tangram system)
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Bundled-Data Datapaths • Problems • random standard cell layout • mixed control + datapath • timing analysis required • robustness of design reduced • Possible Solutions • DI codes • hybrid bundled + DI • simpler timing analysis
DI Codes • Dual Rail (used in 1st Tangram system) • Can use standard cell approach without timing analysis • no need to distinguish between control & data • abandoned in favour of bundled-data • area cost in extra wires • area & time cost in completion detection • Tangram/Balsa generates push-pull pipelines with expensive synchronization
• c c o i B B Generic Pipeline • Passivators join compiled procedure passivator
C C Passivator Implementation • Bundled Data ar br C aa ba n-wide C-gate data[n] • Dual Rail d0 br d1 n-bits wide dn-1 aa ba
DI Code Synchronizations • Expensive • need C-element synchronisation tree • A partial solution (not always possible/desirable) is: • transform to push-style datapath • (not possible in Tangram only Balsa)
c c o i • B B Push Pipeline Passive input port connector (wires-only)
Hybrid Solutions • Use DI coding within bundled datapath framework • e.g. use dual-rail carry signals within a conventional adder • early completion easily detected • Average-case performance • Only applicable to a few datapath operations
Simpler Timing Analysis • Separate control and datapath • generate regular, compiled, datapath • area improvement over standard cell (because of regular layout) • generate matched delay paths (c.f. self-timed PLAs) • must be able to recognize datapath • difficult: control often contains datapath-like elements. • e.g. start at variables and work backwards ...
Datapath meets Control • Example: Balsa case statement 1 hot encoding data “n” bits wide true/complement lines: dual-rail expansion
Case Component • input from datapath • dual-rail simplifies internal logic • expansions parameterisable • “encode” component is similar • opposite of case with true/false expansion
Simpler Timing Analysis • Tool support required • use existing (non-Balsa) tools if possible • automatically add matched paths/delays to synthesised datapaths • Design own cells where appropriate • e.g. hybrid stages
Future Work • Provide support for DI, hybrid and datapath-compiled datapaths • even with datapath compilation, some datapath would still be standard cell • e.g. instruction decoder (control heavy) • datapath in control • cost of connecting separate blocks in layout • Test Design required (datapath heavy)
Tool Enhancement • balsa-c • support for attribution to select compilation mechanisms/ optimisation schemes • breeze2lard • new models • balsa-netlist: • new tech-mapping descriptions • interface to datapath compilers