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Proposed SIFS and Slot Values

Proposed SIFS and Slot Values. Authors:. Date: 2012-07-16. Outline. Simulation results of several companies in 802.11ah show improved MAC Tput with shorter slot and SIFS times.

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Proposed SIFS and Slot Values

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  1. Proposed SIFS and Slot Values Authors: Date: 2012-07-16 Ron Porat, Broadcom

  2. Outline • Simulation results of several companies in 802.11ah show improved MAC Tput with shorter slot and SIFS times. • Even more important than in 11ah, 11af is supposed to provide high Tput for extended range WiFi applications such as cellular offload and high speed broadband access. • We analyze the components of SIFS and Slot times and propose suitable numbers for 11af Ron Porat, Broadcom

  3. Definitions Ron Porat, Broadcom

  4. As a reference we look at the values for different BW defined in clause 18 • Slot time uses a formula of 5+4x20/BW (CCAtime grows with BW, the rest stays the same) • SIFS grows inversely proportional to BW • Specific breakdown of values is in table 18-17 shown fully in the Appendix Clause 18 Values Ron Porat, Broadcom

  5. Currently in .11g/n/ac a value of 9uS is used and is the sum of: • CCA time (<4uS) – this value is based on detecting a 20MHz OFDM signal at -82dBm level with >90% probability. Note in reality shorter times are achieved at the SNR level of a signal at -82dBm • Air propagation time (<<1uS), MAC processing delay (M2) (<2uS) and Rx/Tx turnaround time (<2uS). Note that MAC processing delay here (M2) is not the same as MAC processing delay for DATA (M1). • Similarly to clause 18, CCA time grows inversely proportional to BW and the proposed values for clause 23 are : • For 6/7MHz channels 4x20/5.333=15uS.  • For 8MHz channels 4x20/7.111=11.25uS • Air propagation time for 11af may increase to account for applications such as cellular offload and we therefore increase the number to 3uS (round trip delay of about 1km). • MAC processing delay and TxPLCPDelaydo not increase because they are performed ahead of time and this was used in the derivations in clause 18. • M2 (MAC processing delay) is <0.25uS • TxRFDelay = increases inversely proportional to BW. We assume 0.5uS for 20MHz and hence 1.875uS for 6/7MHz and 1.4uS for 8MHz • Tx digital filter delay – due to sharper filtering the Tx chain delay will increase and we budget around 1uS • Total Tx delay can be rounded up to 3uS for 6/7MHz and 2.5uS for 8MHz Slot Ron Porat, Broadcom

  6. Summary of values • For 6/7MHz channels 15(CCA)+3(propagation)+3(TxDelay)=21uS.  • For 8MHz channels 11.25(CCA )+3(propagation)+2.5(TxDelay)= 18uS (rounded up) Slot Ron Porat, Broadcom

  7. Currently in .11g/n/ac a value of 16uS is used and is the sum of Rx/Tx turnaround time and RF/PHY/MAC processing delay (M1). Processing delay assumes packet DATA processing delay • Note this is the SIFS ‘budget’ – actual implementations typically have lower values. • Digital delay – digital delay will increase inversely proportionally with BW but given the reduction in BW of TGaf compared with TGac (a ratio of about 1/3) the internal clock for post FFT PHY and MAC can run twice as fast as with plain downclocking and shorten the digital processing delays. • However, note that unlike clause 18, the basic channel unit (~5MHz) uses a larger FFT size (128FFT vs. 64FFT). Larger FFT size will incur processing delay penalty • FFT processing time can be assumed to be one symbol and hence the penalty is one 64FFT size symbol • Hence we propose the following SIFS times: • For 6/7MHz channels (16+3.2)x20/5.333/2=36uS • For 8MHz channels (16+3.2)x20/7.111/2=27uS SIFS Ron Porat, Broadcom

  8. Straw Poll 1 • Do you support the proposed CCA values of • For 6/7MHz channels - 15uS.  • For 8MHz channels - 11.25uS • Y • N • A Ron Porat, Broadcom

  9. Straw Poll 2 • Do you support the proposed air propagation values of • For 6/7/8MHz channels - 3uS.  • Y • N • A Ron Porat, Broadcom

  10. Straw Poll 3 • Do you support the proposed slot values of • For 6/7MHz channels - 21uS.  (QCOM 26) - final 24 • For 8MHz channels - 18uS (QCOM 21) – final 20 • Y • N • A Ron Porat, Broadcom

  11. Straw Poll 4 • Do you support the proposed SIFS design philosophy • Option A: SIFS values shall be derived from downclocking 20MHz and adding a penalty for 128FFT - roughly (16+X)*20/BW • Option B: SIFS values shall be derived from downclocking 40MHz (roughly 16*40/BW) • Option A - 11 • Option B - 14 • Other - 2 Ron Porat, Broadcom

  12. Straw Poll 5 • Do you support the proposed SIFS design philosophy • Option A: SIFS values shall be derived from using a 2x faster clock (leveraging 11af narrow BW) • Option B: SIFS values shall be derived from using a 1x faster clock • Option A – 10 • Option B - 15 • Other - Ron Porat, Broadcom

  13. Straw Poll 6 • Do you support the proposed SIFS • For 6/7MHz channels - 115uS  • For 8MHz channels - 86uS • Y - 15 • N - 9 • A - 13 Ron Porat, Broadcom

  14. Appendix Ron Porat, Broadcom

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