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x86 MMU

x86 MMU. Shadow Page Table. Extended Page Table . Guest wants to access GVA 0 , guest PTE (page table entry) maps GVA 0 to GPA 0 Hardware checks NPT (nested page table) NPT entry for GPA 0 is empty, we have a NPT page fault

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x86 MMU

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  1. x86 MMU

  2. Shadow Page Table

  3. Extended Page Table

  4. Guest wants to access GVA 0, guest PTE (page table entry) maps GVA 0 to GPA 0 • Hardware checks NPT (nested page table) • NPT entry for GPA 0 is empty, we have a NPT page fault • KVM goes in, checks where GPA 0 is mapped (through memslots), finds GPA 0 -> HVA x,resolves HVA x to HPA y (through QEMU page table), adds GPA 0 -> HPA y mapping to the NPT • Guest runs again, the memory access it did before would resolve GVA 0 -> GPA 0 -> HPA y

  5. GVA -> GPA (guest page table) • GPA -> HVA (memslot) • HVA -> HPA (QEMU page table) • GPA -> HPA (nested page table)

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