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Unlock the power of digital logic with Boolean algebra, Karnaugh maps, Gray code, DeMorgan’s rules, and canonical form. Learn how to simplify complex circuits and optimize logic expressions for efficient electronic designs.
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Week 3 Logic will get you from A to B. Imagination will take you everywhere. Albert Einstein
Digital Logic • Represents Binary outcomes • statement TRUE FALSE • answer YES NO • light OFF On • switch CLOSED OPEN • one bit 1 0
11. A + A’B = A + B 12. A(B+C) = AB + AC 13. (A+B)(C+D) = AC+AD+BC+BD 14. (A + B)(A + C) = A + BC Note: A,B,C can represent a single variable or a combination of variables. Thus, rule 13 can be easily derived from rule 12. Basic Rules of Boolean Algebra 1. A + 0 = A 2. A + 1 = 1 3. A • 0 = 0 4. A • 1 = A 5. A + A = A 6. A + A’ = 1 7. A • A = A 8. A • A’ = 0 A’’ = A A + AB = A
DeMorgan’s Rules • (A + B)’ = A’B’ • (AB)’ = A’ + B’ • By taking the inverse of each side they can be re-written as: • A + B = (A’B’)’ • AB = (A’+B’)’
Gray Code • unsigned decimal gray • 000 0 000 • 001 1 001 • 010 2 011 • 011 3 010 • 100 4 110 • 101 5 111 • 110 6 101 • 111 7 100
Karnaugh Map Example Cont.A’B’C’ + AB’C’ + A’BC’ + ABC’ B is not covered, and both B and B’ are included, So we ignore B C’ is common to the entire grouping, So it is included A is covered over the full Range so we ignore A Final Result : X = C’
Canonical Form • Canonical means all variables are represented in each term. • X = a’b + ac is a minimum representation • Change to Canonical Form • = a’b(c+c’) + a(b+b’)c • = a’bc + a’bc’ + abc + ab’c • This implies that some variables are redundant
BCD to 7 segment display Logic Each segment is controlled by it’s own logic To reduce the boolean equation in a Karnaugh Map we plot the don’t care states. If appropriate we can use these to form larger groupings, thus simplifying the logic. One equation for each segment. 0 0000 1 1 0001 0 2 0010 1 3 0011 1 4 0100 0 5 0101 1 6 0110 1 7 0111 1 8 1000 1 9 1001 1 10 1010 x 15 1111 x Don’t Care abcd Segment 1