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OCP-IP Technical Vision WG Meeting Milpitas, California, USA January 14, 2009. Agenda.
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OCP-IPTechnical Vision WG MeetingMilpitas, California, USAJanuary 14, 2009
Agenda 1:30-1:35 PM: Call to Order (Drew) 1:35-2:35 PM: Review Proposals for 2009 Work Groups provided from Chairs (Debug, FVWG*, Metadata WG, NoC BWG, SLDWG, SWG, Cache Coherency*)2:35-5:00 PM: Review of Long Term Vision (Drew) - Revisit Existing Items - Add New Items Based on Input From Chairs - Revisit Priorities 5:00 PM: Motion to Adjourn7:00 PM: GSC Dinner* Not formally operating today.
Agenda 1:30-1:35 PM: Call to Order (Drew) 1:35-2:35 PM: Review Proposals for 2009 Work Groups provided from Chairs (Debug, FVWG*, Metadata WG, NoC BWG, SLDWG, SWG, Cache Coherency*)2:35-5:00 PM: Review of Long Term Vision (Drew) - Revisit Existing Items - Add New Items Based on Input From Chairs - Revisit Priorities 5:00 PM: Motion to Adjourn7:00 PM: GSC Dinner* Not formally operating today.
MDWG Rough plan: Phase 2 (IP-XACT 1.4 & OCP 3.0) Build a set of generators used by integration tools to Check the inter-interface consistency (Current configuration compliance checks) Check consistency of a connected master / slave interface pair (Current interface interoperability checks) Check consistency of the ports and parameters Generate the rtl.conf file out of configured IP-XACT parameter list (legacy support) Configure IP-XACT parameter list based on an rtl.conf file and give rtl.conf files of OCP standard profiles as examples (legacy support) Add OCP 3.0 signals and parameters Add support for transactional ports (SystemC) Finalized Q2 / 2009 4
MDWG’s current status • Phase 1 is near completion • Magillem/Sonics & ST base code went through a review with minor changes • Subversion repository for the code set up • Implement the review changes • Next steps • Complete the code (e.g. not all the parameters and checks have been implemented yet) • Create examples of correct and incorrect interfaces • Can this be done automatically somehow? • Continue with implementing the needed checkers and other parts of Phase 2 • Reserve time for discussing the implementation possibilities • IP-XACT1.5 proposal submission
SLD WG Goals for 2008 • Alignment with OSCI • Use TLM 2.0d2 for TL1-3 • Continued improvement • Better regression tests, etc. • OCP Specification 3.0 • Upgrade to 3.0; will be higher priority soon
SLD WG Goals WP-1.1 Initial architectural specification Done: 22. April 08 WP-1.2 Implement the payload extensions already understood from the feasibility study Done: 02. July 08 WP-1.3 Document the new interoperability interface Due: 26 September 08 WP-1.4 Implement those features ignored during the feasibility study Done: 02. July 08 WP-1.5 Implement OCP configuration system for TLM models Done: 02. July 08 WP-1.6 Replacement bus monitoring infrastructure for TLM models Due: 18. July 08 Note: New Interface is GreenAV callback. Backwards compatibility adapters are provided. (GreenSocs adopted 17 days from Sonics) WP-1.7 Sanity and (TLM-)protocol checking Due: 12. September 08 (GreenSocs adopted 20 days from Sonics) 7
SLD WG Goals (cont’d) WP-1.8 Backwards-compatibility adapters Due: 26 September 08 (GreenSocs adopted 8 days from Sonics) WP-1.9 Regression tests Due: 18. July 08 Note: With WP-1.9 finished, there will be an internal beta release, so the WG can review/challenge the new kit. WP-1.10 Validation of technology across all OCP configurations Due: 29. August 08 Note: Start is end of WP-1.9. Estimated workload is 4 weeks, but my annual vacation (2 weeks) is embedded, so it’s 6 weeks Important: WP 2.3/2.5/2.6 (40 days) are all assigned to GreenSocs, however in Nice we decided to assign those to Sonics. Consequently, GreenSocs has adopted Sonics items worth 45 days (see above). WP-2.? Extend TL1 Kit (WP1.X) for TL2 This has to be scheduled by Sonics. Starting date can be after WP-1.9. Note: There is no(!) committed task for that in the SOW, but it has to be done. Note: Sonics has to estimate the necessary amount of days for that. 8
SLD WG Goals (cont’d) We are currently roughly here We expect the final release shortly,but we are held back by regressiontestsDocumentation is mostly done, andthere are existing examples. The internal deliverable will be made from GreenSocs within a month. WP-2.3 Implement OCP configuration system for TLM models This has to be scheduled by Sonics. Starting date can be after WP-2.?. WP-2.5 Backwards-compatibility adapters This has to be scheduled by Sonics. Starting date can be after WP-2.?. WP-2.6 Regression tests This has to be scheduled by Sonics. Starting date can be after WP-2.3. WP-4.1 Additional TL1, TL2 and TL3 examples using the new APIs This is committed but scheduled for R2. So it is not scheduled yet. WP-4.2 Documentation Due: 10. October 08 WP-4.3 Release Due: 10. October 08 WP-4.4 White paper on usage models This should be scheduled by Mark Burton. 9
SWG/Cache Coherence Goals for 2009 • Placeholder
FVWG Goals for 2008 • Continuations – Performance • Revise Intro and Latency sections based on feedback – complete by end February • Make performance chapter whole – complete by end March • Create Throughput/Bandwidth section • Create Filters section • Review full performance chapter – complete by end June • Specification Support – Timeline driven by Spec’n WG • Support errata efforts • Support update currently under discussion in Spec’n WG • Communication with Spec’n WG on checks • Review of updated document • Support cache coherency specification release • Development & review of additional checks
FVWG Goals for 2009 • TBD
NoC BWG Update (Q408) and Future Actions (2009) NoC benchmarks – applications modeling and hardware description Article accepted by IET Computers & Digital Techniques, pending publication Article on NoC Microbenchmarks – published online by embedded.com NoC benchmarks case: multimedia In preparation, tentatively Q109 13
NoC BWG ongoing and future actions Test-cases for benchmarks utilization: Multimedia – Sonics & NoC WG, in preparation Real-time applications (QoS oriented) - TBD Parallel processing (general purpose computation) - TBD Sources for benchmarks data: industry, universities? OCP-IP System Level Design Group GreenSoCs Contact with EEMBC consortium (Markus Levy) Evaluation guidelines – in preparation 14
Debug WG Goals for 2008 • Debug WG is looking for 5 companies that would provide: • Debug hardware IP block for multi-core OCP debug sockets • Debug software package that can display 2 or more cores in one GUI with time aligned events (if possible following SPRINT server API) • XML file provider that would hold debug software information about the multi-core debug hardware and processor cores in a chip system according to SPRINT rules • XML file provider who would code the OCP debug interface as a XML file for SPIRIT hardware generators • One OCP interconnect generator provider who would include automatic interconnect for debug sockets in a system • If we find the first two the OCP debug standard mission will be accomplished. The rest is just to increase comfort when working with this solution
OCP-IP Debug WG Goals for 2009 4 5 6 7 8 9 10 11 12 1 2 3 May-June Check OCP 3.0 Standard for compatibility (delayed) Ongoing Promote and present debug slides in shows and journals IEEE International High Level Design Validation and Test Workshop on Nov 20 and 21, 2008, Neil Stollon OCP TLM paper that’s being presented at ASP-DAC in Japan, January, Prof. K.J. Lee of NCKU, -> VLSI-DAT'09 paper SPRINT Project: SoC Design and Integration Standards at TLM with SystemC, IP-XACT, Debug API and AXI extensions , Yokohama , Japan , January 21, 2009, Albrecht Mayer OCP WG Presentation at DATE 2008 has been downloaded 250 times from the OCP-IP website July-Aug Physical Specification, Propose waveforms for OCP signals (delayed) Sept -Oct Propose basic debug “transactions” for debug (delayed) Nov - Dec Publish it inside OCP for greater review (delayed) --------------------------------------------------------- Searching for new points of engagement with industry and universities UBC (University research work) Brad Quinton's PhD thesis: uP Debug Visibility (Steve Wilton) Mercury (Looking for better multicore debug solutions) Charlie Frazer, cfrazer@mc.com SPRINT (Published first realized heterogeneous multicore debug with MCDS) FPGA (Rising popularity after SoC chip building has SoFPGA) Temento (OCP debug instrumentation) neals@hdldynamics.com 16
Agenda 1:30-1:35 PM: Call to Order (Drew) 1:35-2:35 PM: Review Proposals for 2009 Work Groups provided from Chairs (Debug, FVWG*, Metadata WG, NoC BWG, SLDWG, SWG, Cache Coherency*)2:35-5:00 PM: Review of Long Term Vision (Drew) - Revisit Existing Items - Add New Items Based on Input From Chairs - Revisit Priorities 5:00 PM: Motion to Adjourn7:00 PM: GSC Dinner* Not formally operating today.
Agenda 1:30-1:35 PM: Call to Order (Drew) 1:35-2:35 PM: Review Proposals for 2009 Work Groups provided from Chairs (Debug, FVWG*, Metadata WG, NoC BWG, SLDWG, SWG, Cache Coherency*)2:35-5:00 PM: Review of Long Term Vision (Drew) - Revisit Existing Items - Add New Items Based on Input From Chairs - Revisit Priorities 5:00 PM: Motion to Adjourn7:00 PM: GSC Dinner* Not formally operating today.