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PCI Status. Aug 8, 2002. Status since last meeting (Jul 15) PCI Protocol Check in P-PCI Protocol violation found using PCI bus analyzer
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PCI Status Aug 8, 2002 Status since last meeting (Jul 15) • PCI Protocol Check in P-PCI • Protocol violation found using PCI bus analyzer • Violation of handling PCI signals when the target (host bridge) requests (STOP#) the initiator (P-PCI) to stop the current transfer cycle (STOP# asserted when the memory is busy) • HUPs strongly related to data transfer between FIFO and memory, so this violation can cause HUPs => Change start timing of access from P-PCI to memory • The fixed version (DB11) has NO protocol violation Y. Ushiroda, Y. Yasu (KEK), H. Ishino (TIT), Y. Yamashita (Tokyo) and K. Hasuko (RIKEN) Belle/SVD Meeting
PCI Status (Cont’d) • PC-to-PC connection test • Using DB11 • Test patterns (0x5555, 0xFFFF, etc.) • Some data inconsistencies • PC-to-emulator looks OK • Probably timing errors in output of P-PCI (as transmitter). Should be checked • Connection test with FADC • Still cannot find any glitches at KEK • Sent emulator HDL to Vienna to discuss on P-PCI I/F • Wait for the latest FADCs… Belle/SVD Meeting
TO DO • Find out bugs in output of P-PCI (these bugs are not critical for SVDDAQ, but PC-to-PC tests will be useful) • Connection tests with FADC • Check of P-PCI boards • Checked items at Fird: • Data transfer (100KB) with some patterns • Soldering problem fixed • Should be checked: • In final setup • Tests with more patters, FADC format, etc. • Long-run stability • Anything else? Belle/SVD Meeting