220 likes | 419 Views
Accelerator Laboratory. Long-Pulse Modulator for the Superconducting RF Test Facility. M. Akemoto, H. Honma, H. Nakajima, T. Shidara, S. Fukuda High Energy Accelerator Research Organization(KEK) RPIA 2006, March, 7. Table of Contents. Accelerator Laboratory. STF plan
E N D
Accelerator Laboratory Long-Pulse Modulator for the Superconducting RF Test Facility M. Akemoto, H. Honma, H. Nakajima, T. Shidara, S. Fukuda High Energy Accelerator Research Organization(KEK) RPIA 2006, March, 7
Table of Contents Accelerator Laboratory • STF plan • L-band Long-Pulse Klystrons • STF #1 Modulator for 5 MW Klyston • Design of STF #2 Modulator for 10 MW Klystron • Summary
Accelerator Laboratory STF is a project at KEK to build and operate a test linac with high-gradient superconducting cavities, as a prototype of the main linac systems for ILC.
Main goals of STF Accelerator Laboratory Phase 1 (2005 -2007) consists of two units of 5MW L-band RF sources which drive a 200kV DC gun and a 10m-long cryostat. The cryostat will contain up to eight 9-cell L-band cavities, producing an accelerating gradient of 35-45MV/m. Its initial beam operation is expected in early 2007. Phase 2 (2007 - 2009) consists of one unit of 10MW L-band RF source which drive two full-size(16m) cryomodules with 10 cavities.
5 MW Klystron Accelerator Laboratory Specifications • Operating Frequency 1.3 GHz • RF Pulse Width 1.5 ms • Peak Output Power 5 MW • Beam Voltage 124 kV • Beam Current 92 A • Micro-Perveance 2.1 • Repetition Rate 5 pps • Efficiency 46 % TH2104A
10 MW Multi-Beam Klystron Accelerator Laboratory Specifications • Operating Frequency 1.3 GHz • RF Pulse Width 1.5 ms • Peak Output Power 10 MW • Number of Beams 6 • Beam Voltage 120 kV • Beam Current 140 A • Micro-Perveance 3.4 • Repetition Rate 5 pps • Efficiency 60 % Toshiba MBK
STF Modulator #1 Accelerator Laboratory • For cost and time saving, PNC modulator, which was designed and built about 10 years ago, and was inherited from Power Reactor and Nuclear Fuel Corp(PNC) was adapted for STF Modulator #1 to drive a 5 MW klystron. PNC Klystron Modulator System
From PNC Modulator to STF Modulator#1Modulator Requirements Accelerator Laboratory • Reuse PNC modulator by adding a capacitor bank, a new pulse transformer, a bouncer circuit.
Schematic Circuit Diagram of STF Modulator#1 Accelerator Laboratory ~100m High-Voltage Cable • Use existing components possible • Add 150µF capacitor • Install a bouncer circuit • Change to new pulse transformer for long pulse operation
STF Modulator#1 Accelerator Laboratory Capacitor Bank and Crowbar unit VCB SCR unit DC Power Supply(Tent House)
STF Modulator#1 Accelerator Laboratory Klystron TH2104 Control Rack IGBT Switch unit Pulse Transformer Klystron Gallery
IGBT Switch Accelerator Laboratory Use 36 IGBTs in series Trigger: Optical fiber cable IGBT Mitsubishi CM600H-24H Rated Voltage : 1200V Rated Current : 600A IGBT Driver Board Switch unit
Pulse Transformer Design Accelerator Laboratory • Specification of Pulse Transformer • Primary voltage 21.7 kV • Primary current 588 A • Primary impedance 36.8Ω • Secondary voltage 130 kV • Secondary current 98 kV • Secondary impedance 1327 Ω • Flat-top pulse width 1.5 ms • Rise-time(10-90%) 40µs • Pulse droop < 3% • Step-up ratio 1:6 • Pulse repetition rate 5pps Core assembly • Cores • 25 Cores used for JHF pulse transformer are reused in total number of 39 cores for cost saving. • Material is 0.22mm thick silicon steal ribbon. • 4.4 tons in weight • Design Feature • DC bias • Auto winding • Heater transformer is isolation transformer type.
Pulse Transformer for STF Modulator #1 Accelerator Laboratory • Design parameters • (in the primary side) • Primary inductance : 1.67H • Leakage inductance : 570 µH • Distributed capacitance : 63 nF 1255mm 660mm 1710mm Schematic winding diagram Core-and coil assembly
Test Operation without Bouncer Circuit Accelerator Laboratory Klystron Current Pulse at Klystron Breakdown Klystron Current Pulse Es=17kV, Pw=1.7ms, fr=5pps Peak Klystron voltage=98kV Rise-time(10-90%)=33µs Es=16kV, Pw=1.7ms, fr=5pps
Bouncer Circuit Optimization Accelerator Laboratory • Parameters of Resonance LC circuit • T/2=π(LC)1/2 • IP=VB(C/L)1/2 • tB = Bouncer switching timing • VB =Bouncer voltage • Operating condition • Capacitor bank droop=16% • L=1.2mH, C=0.42mF • T/2=2.2ms • Main switch 1.3ms on, 3.0ms off • Simulation results • VB=2.35kV • tB=-0.55ms • Pulse Flatness:0.8%(p-p) 0.8%
STF Modulator#2 Design Accelerator Laboratory • New modulator which is capable to drive a 10 MW MBK klystron is designed and manufactured. • Basic Design is based on TESLA/FNAL design. (1) DC Power Supply Use switching power supply but low cost is important issue. (2) Storage Capacitor Use SH(Self-Healing)type capacitors (3) High-reliability Main Switch Use high voltage and high current IGBT devices (Example IEGT) Low-voltage design in the primary side of the pulse transformer (4) Pulse Transformer Low leakage and compact design
Specifications of STF Modulator#2 Accelerator Laboratory • Peak Output Power 16.8 MW • Klystron Voltage 120 kV • Klystron Current 140 A • Pulse width 1.7 ms • Flat-top width >1.5 ms • Flatness ±0.5% • Repetition Rate 5 pps • Pulse Transformer Ratio 1:15 • Capacitor Bank 2000 µF • Series Switch Voltage 8.0 kV Current 2.1 kA
Schematic Circuit Diagram of STF Modulator #2 Accelerator Laboratory
ComparisonofIEGTandIGCT Accelerator Laboratory IEGT(Injection Enhanced Gate Transistor) IEGT Gate Drive Circuit IGCT(Integrated Gate-Commutated Thyristor) IGCT Gate Drive Circuit
Summary Accelerator Laboratory • The STF plan started from FY2005. For this phase 1 project, two rf sources are to be fabricated. • STF modulator#1 for 5 MW Klystron is under construction by reinforcing the PNC modulator. The operation test with a bouncer circuit will be completed in April. • STF modulator#2 is being designed to drive a 10MW MBK klystron.