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ECE 353 Introduction to Microprocessor Systems

ECE 353 Introduction to Microprocessor Systems. Michael J. Schulte. Week 4. Data Transfers and Addresses Addressing Modes Memory Allocation Structures Strings Table Look-up Address Object Transfers Memory Alignment Considerations. Topics. Data Transfers.

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ECE 353 Introduction to Microprocessor Systems

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  1. ECE 353Introduction to Microprocessor Systems Michael J. Schulte Week 4

  2. Data Transfers and Addresses Addressing Modes Memory Allocation Structures Strings Table Look-up Address Object Transfers Memory Alignment Considerations Topics

  3. Data Transfers • Internal vs. External Registers • Each register in the processor (internal) as well as memory and I/O registers (external) has an address – they’re just not all in the same space. • Logical Addresses • Registers • I/O • Memory • Addressing Modes • Addressing modes determine how and when operands can be accessed in registers, I/O space, and memory space.

  4. Instructions of the Week • IN acc, port • OUT port, acc • INS dst_s, port • OUTS port, src_s • MOV dst, src • XCHG dst, src • MOVS dst_s, src_s • LODS src_s • STOS dst_s • XLAT translate_tble

  5. Addressing Modes • Immediate Addressing • The operand is encoded within the instruction itself • Immediate operands are constants, so they must be the source operand, not the destination • Values are sign-extended as required • ASM86 numeric notation suffixes – B, Q or O, H • Defined constants (EQU) • Character constants • Assembler expressions • Allow assembler to do some low level calculations • Conditional assembly • MOV instruction

  6. Addressing Modes • Register Addressing • The operand is one of the 80C188EB’s internal registers. • Register operand encoding only requires 3-bits plus w bit, so shorter instructions. • Does not run an external bus cycle • No EA calculation • No R/W cycle • XCHG Instruction

  7. Addressing Modes • I/O Port Addressing • IN and OUT are most common I/O instructions. • AX or AL must be used as the source (OUT) or destination (IN). • The width (byte/word) of the transfer is determined by the register choice. • Physical address always has A19:16 = 0. • Segment registers are not used.

  8. Addressing Modes • Fixed Port Addressing (I/O) • Address of I/O port is encoded within instruction, limited to 8-bits • Can only access 0000h – 00FFh • Can be used for byte or word ports • 80C188EB requires two transfers to read/write word ports • I/O port address is constant, i.e. must be known at assembly-time • IN instruction

  9. Addressing Modes • Variable Port Addressing (I/O ) • DX register is used to supply a 16-bit address • Can access entire I/O space • Byte or word transfers • DX is not modified by instruction, just used as a pointer (like indirect addressing) • Allows for port addresses to be computed or operated on at run-time (i.e. incrementing through a range of port addresses in a loop)

  10. Addressing Modes • I/O String Port Addressing • INS • Transfers from an I/O port to ES:DI • OUTS • Transfers from DS:SI to an I/O port • Requires two transfers, i.e. INS transfers from I/O port to a temporary register, then the temporary register is transferred to memory • Most often used in combination with the REP modifier for low-overhead block moves

  11. Memory Allocation • Memory operand types • Byte, word, double-word • Stored in little-endian format • Data item attributes • Type, Offset, Segment • Data allocation directives • DB, DW, DD • Identifiers • Initializers • Arrays and strings • Setting up a data segment • Variable naming

  12. Memory Addressing Modes • Every memory location is referred to by a logical address (segment:offset) • BIU provides the segment • EU supplies the offset (EA) • EA calculation is based on the addressing mode • In general, the EA is computed as: • EA = [displacement] + [BX or BP] + [SI or DI] • Displacement is an 8- or 16-bit constant supplied at assembly-time • In the original 8088, EA computation used the ALU and so added a significant delay to the instruction execution time – the 80188 added dedicated address generation hardware to speed things up.

  13. Memory Addressing Modes • Direct Addressing • EA is a variable’s offset within the applicable segment • EA is contained in the displacement field of instruction (16-bit value) • The address is a constant determined at assembly-time • The segment register used is based on the instruction (default segment), the location of the label used to specify the offset, or the use of an explicit segment override prefix

  14. Memory Addressing Modes • Register Indirect Addressing • EA is contained in an index or pointer register • BX, BP, DI , SI • Remember – BP always uses SS • Getting the EA of a label • The OFFSET assembler operator. • Resolving anonymous memory references • The PTR assembler operator • Other assembler attribute operators

  15. Memory Addressing Modes • Indexed Addressing • EA = displacement + [SI, DI, BX or BP]. • Displacement is a constant calculated at assembly-time. • Typically used for accessing data in arrays. • Displacement = array starting offset • Register holds (element index × element size) • If array of bytes, element size = 1 • If array of words, element size = 2 • If array of double-words, element size = 4

  16. Memory Addressing Modes • Based Addressing • EA = [BX, BP, DI or SI] + displacement. • Displacement is a constant calculated at assembly-time. • Typically used for accessing information in data structures. • Register holds starting address of structure. • Displacement = offset from start of structure to desired structure element. • Code can access any instance of the structure just by changing register contents to point at it.

  17. Memory Addressing Modes • Based Indexed Addressing • EA = [BX, BP] + [DI, SI] + displacement. • Displacement is a constant calculated at assembly-time. • Typically used for accessing information in arrays of data structures. • BX = starting offset of array • DI = offset to desired array element • Displacement = offset within a structure to the desired element.

  18. Memory Addressing Modes • String Addressing • Memory source is DS:SI • Can override to CS, ES, SS • Memory destination is ES:DI • String instruction primitives • INS, OUTS, MOVS, LODS, STOS • The size of the operand is determined by the data type or by appending B or W to the mnemonic. • All automatically update DI/SI based on the direction flag (DF) and operand size. • String instructions commonly use the REP prefix to do block operations (more on that later)

  19. Creating Data Structures • Structure template • STRUC / ENDS • Defines a data structure, does not allocate memory. • Structure use • Allocating space for structure. • Initializing structure members. • Referring to structure members using direct addressing. • Creating and indexing arrays of structures.

  20. Addressability • Operand addressability • Definition • Using the ASSUME directive • Purpose • Relation to segment register contents • Segment override prefixes • Assembler generated • Explicit

  21. Allocating ROM Space • In an embedded system, the code segment is usually in ROM. • Data variables in the code segment will be placed in ROM also – so are constant. • Example • Look-up tables • Purpose • Usage • Indexed addressing • XLAT instruction

  22. Address Object Transfers • Used to load an address into a register for indirect addressing. • LEA • Calculates the EA for the source operand and stores it in the destination register. • LDS / LES • Loads from a double-word in memory pointed to by the source operand (direct/indirect/etc.). • Low-word is transferred to destination register (often SI/DI), high-word is transferred to the segment register (DS/ES).

  23. 80C186EB Alignment Issues • The 80C186EB has a 16-bit data bus. • Loading a word only takes one cycle, if the word is properly aligned. If loading an unaligned word, two bus cycles are required. • 80C186EB memory map • Data alignment is often an important factor to maximize the efficiency of a wide data bus. • EVEN assembler directive • Forces the following data to be located on a word boundary (even address). • Assembler will pad with a NOP to correct alignment.

  24. Wrapping Up • Reading for next week • Chapter 7, 8.1-8.2 • Homework 2 due on February 18 • Exam #1 will be held Wednesday, 10/13 at 7:00pm. Coverage will be over modules 1 and 2.

  25. Exercises • Create a source code template with a code segment and a data segment, establish addressability • Declare a 100 byte array in DS and initialize to 0 • Create a far (32-bit) pointer to the array in DS • Declare a word variable in CS • Copy the segment part of the far pointer to the word variable you just declared • Load BL with the 51st element of the array using indexed addressing • Fill the 99th array element with its index using based addressing • Exchange the 99th and 100th elements of the array • XCHG instruction

  26. MOV instruction

  27. XCHG Instruction

  28. IN Instruction

  29. OUTS instruction

  30. Notation Trivia c signed character uc unsigned character i integer ui unsigned integer si short integer li long integer n an integer number where the actual size is irrelevant f float d double s string of characters sz string of characters, terminated by a null character b an integer or character used as a boolean value by single byte ct an integer being used as a counter or tally p pointer to a structure or general void pointer px pointer to a variable of class x, e.g. pi, pf, pli

  31. ROM Variables .186 assume ds:data, cs:code data segment DATA_VAR db 1 ;declare DS variable data ends code segment CODE_VAR db 2 ;declare CS variable start: mov ax, data ;setup data segment mov ds, ax mov al, DATA_VAR;load DS variable mov al, CODE_VAR;load CS variable jmp start code ends end start

  32. ROM Variable Listing … … 0006 A0 0000r mov al, DATA_VAR 0009 2E:A0 0000r mov al, CODE_VAR … … • 2Eh is the CS segment override prefix • r indicates that this is a relative offset within the segments in this file – the linker will calculate the actual value after it combines any other segment pieces into one segment.

  33. Data Alignment • The 80C186 memory map is logically the same as the 80C188, but it is physically different. data segment Var1 dw 1234h db ? Var2 dw 789Ah data ends Var1 Var2

  34. SelectedAssembler Expression Operators

  35. XLAT Instruction

  36. Another Exercise • Given the below variable declarations, address the middle element of VAR1 using direct, register indirect, and indexed addressing. VAR1 dw 0, 1, 2, 3, 4 VAR2 dw 0, 1, 2, 3, 4 VAR3 dw 0, 1, 2, 3, 4 • What sort of addressing would be appropriate if you were searching… • Through a single array? • Looking at a certain element in all of the arrays?

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