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G é rard: The Hard Man behind the Soft Core. Satnam Singh Microsoft Research, Cambridge UK The University of Birmingham. !. multiple independent multi-ported memories. hard and soft embedded processors. fine-grain parallelism and pipelining. BlockRam Memory Map (.bmm).
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Gérard: The Hard Man behind the Soft Core Satnam Singh Microsoft Research, Cambridge UKThe University of Birmingham
multiple independent multi-ported memories hard and soft embedded processors fine-grain parallelism and pipelining
BlockRam Memory Map (.bmm) # CPU address space 0xFFFFE000 - 0xFFFFFFFF. ADDRESS_BLOCK dramctlr BUS_BLOCK [0xFFFFF000:0xFFFFFFFF] xrefdes/dramctlr/bram0 [7:0] LOC=RAMB16_X0Y0; xrefdes/dramctlr/bram1 [15:8] LOC=RAMB16_X1Y0; xrefdes/dramctlr/bram2 [23:16] LOC=RAMB16_X2Y0; . . . END_BUS_BLOCK; END_ADDRESS_BLOCK; DATA2BRAM .bit File ELF File 0101110001110001 1101001110011001 0011100011100101 0110001110001110 0101110001110001 1101001110011001 0011100011100101 0110001110001110 .mem File New .bit File 0101110001110001 1101001110011001 0011100011100101 0110001110001110 0101110001110001 1101001110011001 0011100011100101 0110001110001110
ZBT SSRAM SDRAM DDRSDRAM ROM OPB ZBT SSRAMController SDRAMController DDR SDRAMController External BusController OPB Bridge On-ChipPeripheral CoreConnect OPB(On-Chip Peripheral Bus) CoreConnect Processor Local Bus (PLB) Arbiter On-ChipPeripheral 405 PPC I-Cache PLB OPB Bridge D-Cache PLB High-SpeedPeripheral
locks monitors condition variables spin locks priority inversion
ray of light Signal Esterel Jazz Lustre SHIM PRET-C
Gérard wearing Satnam’s ring Satnam wearing Gérard’s ring San Jose, 6 June 2003
Gérard Berry Nicolas Halbwachs Albert Benveniste Synchronous Programming Language Combat Team
Zerodelayexample: NewtonianMechanics Concurrency + Determinism Calculations are feasible
Predictable delay examples: sound, light, waves • Wait long enough, same result as 0-delay ! • Zero delay and predictable delay are fully compatible • Constructive semantics is the unification • A theory of causality for reactive systems • Clocked digital circuits paradigm
Esterel code Safe State Machines loop [ await A|| await B ] ; emit O each R
VHDL, Verilog -> hardware implementation void uart_device_driver () { ..... } Esterel design uart.c C -> software implementation
Design Specification Capture Design FunctionalSpec Architecture Verification Requirements Editor Project Structure Debugging & Simulation Editor ArchitectureDiagram (2007) DesignVerification ProjectManagement Simulator IDE DesignVerifier Formal Verification ModelReporter Automatic Documentation IDE SequentialEquivalenceChecker Player DUT Sequential Equivalence check Executable Specification Exporter Code & TestbenchGenerators Optimized for synthesis DFT-ready SystemC & RTL flow integration .sc C / C++ / SystemC Verilog / VHDL .vhd G. Berry, Microsoft Research
Anti Ice Control Unit Flight ControlPrimary & Secondary Commands FlightWarningSystem Braking & SteeringControl Unit SCADE in the Airbus A380 • Flight Control system • Flight Warning system • Electrical Load Management system • Anti Icing system • Braking and Steering system • Cockpit Display system • Part of ATSU (Board / Ground comms) • FADEC (Engine Control) • EIS2 : Specification GUI Cockpit: • PFD : Primary Flight Display • ND : Navigation Display • EWD : Engine Warning Display • SD : System Display G. Berry, Microsoft Research
French Synchronous Language Thread Level Remains High SEVERE: hysteresis HIGH: deadlock ELEVATED: priority inversion GUARDED: non-atomic action LOW: race condition
begin … end static final void procedure if then else while for loop accept case
presentgift thenawaitscream endpresent Thank you Stephen Edwards
presentgift thenpause; everyday doawaitthanks endeveryendpresent Thank you Stephen Edwards
abortnothingwhenbored Thank you Stephen Edwards
everyday donothingendevery Thank you Stephen Edwards
runslowly Thank you Stephen Edwards
awaitfalls ; everybody dosustaindisbelief endevery Thank you Stephen Edwards
presentcase legally dorunaway end present Thank you Stephen Edwards
aborttask whenimmediateobjection Thank you Jens Brandt
abortrunslowly || runfastlywhensleepy Thank you Mike Kishinevsky
trap mouse in every loop do run cheese end every handle hair do run water end trap Thank you Mike Kishinevsky
Engine control software programmed in Esterel by non-French speaker
Esterel present A then emit A end