Chaos, Communication and Consciousness Module PH19510

1. Chaos, Communication and ConsciousnessModule PH19510 Lecture 8 Entering the Transistor Age

2. Overview • Metals, Insulators & Semiconductors • The junction diode • The bipolar transistor • Planar Processing

3. Metals, Insulators and Semiconductors • Metals • Overlap of valence & conduction bands • empty states for electrons to move into •  conduction • Insulators • Large gap between valence & conduction bands • No free states • No conduction • Semiconductors (Silicon, Germanium, GaAs etc) • Small gap between valence & conduction bands •  Some free states •  some conduction – depends on impurities, temperature etc.

5. Column IIIB, IVB & VB • Column IIIB • B, Al … • 3 electrons in outer shell • Column IVB • C, Si, Ge … • 4 electrons in outer shell • Diamond like crystal • Column VB • N, P, As … • 5 electrons in outer shell

6. Crystal structure of Silicon • Diamond like • Tetrahedral bonds • Hard • Brittle

7. Intrinsic Semiconductor • 2D representation of crystal lattice • Semiconductor • All electrons paired • Valence band filled • No-conduction

8. n-Type Semiconductor • Electron donor impurity • Column V (As, P) • Low concentration • ≈1:108 • Add ‘free’ electron • Electron Movement •  conduction As

9. p-Type Semiconductor • Electron acceptor impurity • Column III (Boron) • Low concentration • ≈1:108 • Add ‘hole’ • Hole Movement •  conduction B

10. n n n p p p -ve +ve +ve -ve pn Junction • n-type & p-type  junction • Spare electrons from n-type fill holes in p-type •  depletion region • n-type –ve • depletion region shrinks • forward bias (conduction) • n-type +ve • depletion region grows • reverse bias (no conduction)

11. p p n Ge First Transistor 1947 Brattain, Bardeen & Shockley • Point contact • PNP junction

12. n Collector p Base n Emitter NPN Bipolar Junction Transistor • Emitter at ground • +ve voltage on collector • Collector-Base reverse biased •  no current • Apply +ve voltage on base • Electrons pulled from emitter into base • Collector base depletion region shrinks •  many electrons flow from Emitter to Collector • Amplification

13. Shockley and Silicon Valley • 1955 • Shockely leaves Bell • Forms Shockley Semiconductor in Palo Alto, CA • 12 keen young engineers • ‘Difficult’ management style • 1957 • Staff leave (The Traitorous 8) & form Fairchild Semiconductor

14. From Germanium to Silicon • Germanium rare but easier to refine • Silicon Common • 25.7% of earth crust • Electric Arc refining • Silicon forms stable oxide • Better electrical and mechanical properties

15. Refining • Pure material crystallises first from melt • Impurities left behind

16. Printing Transistors on Silicon • Planar process developed at Fairchild • Possible to dope n-type so it becomes p-type and vice versa • Use of Silicon Dioxide (SiO2) as mask for processing

17. Emitter Base Collector n Planar Transistors • n-Substrate • Grow Oxide • Pattern & etch oxide • Diffuse p-dopant • Grow Oxide • Pattern & etch oxide • Diffuse n-dopant • Grow Oxide • Pattern & etch oxide • Metal Contacts Vertical Transistor

18. Review of Lecture 8 • Metals, Insulators & Semiconductors • The junction diode • The bipolar transistor • Planar Processing

19. ReferencesWhere to go for more Information • inventors.about.com/library/weekly/aa061698.htm • US Patent 2524035www.eepatents.com/feature/2524035.html • Intel Education programme www.intel.com/education/transworks/ • Principles of semiconductor devices ece-www.colorado.edu/~bart/book/book/ • Webelements.com • The Britney Spears guide to Semiconductor Physicsbritneyspears.ac/physics/basics/basics.htm - • www.icknowledge.com