1 / 39

Getting Real-time Performance and Voice Quality on Single Core RISC Devices

Matt Randmaa, VP of Engineering D2 Technologies www.d2tech.com. Getting Real-time Performance and Voice Quality on Single Core RISC Devices. Presentation Outline. VoIP Endpoint Device Software Overview VoIP Endpoint Example, Functionality, Software Blocks

elisa
Download Presentation

Getting Real-time Performance and Voice Quality on Single Core RISC Devices

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. Matt Randmaa, VP of Engineering D2 Technologies www.d2tech.com Getting Real-time Performance and Voice Quality on Single Core RISC Devices

  2. Presentation Outline • VoIP Endpoint Device Software Overview • VoIP Endpoint Example, Functionality, Software Blocks • Traditional Software Architecture (RISC + DSP) • New Software Architecture – VoIP on RISC • Real-time requirements in VoIP • Hard Real-Time, Soft Real-Time, Best Effort • RISC SoC Design Considerations • Toolchain/BSP Considerations • Software Design Considerations • Conclusion

  3. VoIP Endpoint Example:Analog Telephony Adaptor (ATA) • Ethernet to FXS adaptor • Optional second Ethernet port for bridging/routing; FXO for PSTN • Enables a POTS phone to make VoIP calls • May support FAX • SIP User Agent application • Uses SIP protocol to establish calls • Implements many CLASS features • Call Waiting, Caller ID, 3-way Calling, Call Transfer, Call Forwarding, etc

  4. Other Endpoint examples • SOHO Router with VoIP • WIFI AP with VoIP • WIFI ATA • WIFI handset • Dual mode phones • VoIP enabled PDAs, Game Units, MP3 players, iPods • Etc etc.

  5. Legacy HW/SW Architecture:RISC + DSP RISC Processor Responsible for: • Voice Application, Protocol • IP Stack, Data/Voice Packets • DSP Driver DSP Processor Responsible for: • Hard real-time telephony interface • DSP algorithms (MHz intensive) • Separate DSP application • Required to be semi-autonomous

  6. New SW/HW Architecture:Single CPU

  7. Single CPUAdvantages / Challenges • Advantages: • Eliminates DSP • Leverages existing SoC chips • No Interprocessor communication • Single Tools / Development Environment • Challenges: • Hard real-time requirements • MHz burden on RISC • Data/Voice/Application software must co-exist • Telephony interface peripheral

  8. Real-time Requirements in VoIP • VoIP Endpoint Device Software Overview • VoIP Endpoint Examples, Functionality, Software Blocks • Traditional Software Architecture (RISC + DSP) • New Software Architecture – VoIP on RISC • Real-time requirements in VoIP • Hard Real-Time, Soft Real-Time, Best Effort • RISC SoC Design Considerations • Toolchain/BSP Considerations • Software Design Considerations • Conclusion

  9. Information Flow in VoIP

  10. Hard Real-Time in VoIP • Hard Real-Time: Deadline-based processes in which a failure to meet the deadline will result in loss of voice data and unacceptable system behavior. • Hard real-time requirements in VoIP: • Telephony Driver • DSP Algorithms

  11. Hard Real-Time Requirement:Telephony Driver • Telephony Driver: Transmits voice samples to/from the hardware CODEC • Nature of communication: Synchronous serial interface, 64_kbps per channel • 8000 samples/s, 8 bits/sample • One sample transmitted/received every 125 us

  12. Hard Real-Time Requirement:Telephony Driver (continued) Failure in copying in/out each sample before the 125_us deadline results in dropping a voice sample. • Resulting impacts on voice quality • Can be a noticeable click. • Echo canceller can fail, resulting in perceptible echo to far end. • FAX pass-through or FAX Relay can fail. • Causes drift in jitter buffers, which will may cause dropped packets • If subsequent deadlines are missed (domino effect), call failure and system instability can result.

  13. Hard Real-Time Requirement:DSP Algorithms • DSP Algorithms in ATA: Process the voice stream from Telephony Driver and from IP stack to do: • Voice Compression • Echo Cancellation • Tone Generation / Detection • DTMF, FAX/Modem, Call Progress, Caller ID • Packet Loss Compensation • Nature of communication: Block based processing • Typically 80 voice samples per block • One block processed every 10 ms

  14. Hard Real-Time Requirement:DSP Algorithms (continued) • Failure in completing DSP algorithm processing by the end of the 10 ms deadline results in: • Telephony driver will play out old data to hardware CODEC. • Far side also gets bad data due to loss of codec data. • Echo canceller can diverge, causing echo to be heard on subsequent blocks. • Tone detection can fail, resulting in mis-detection of DTMF digits or FAX tones. • Again, if subsequent deadlines are missed (domino effect), call failure and system instability can result.

  15. Soft Real-Time in VoIP • Soft Real-Time: Processes which should execute in a timely manner, for which system behavior degrades (but may not be unacceptable) if the deadline is missed. • Soft real-time requirements in VoIP: • Voice Packetization and Transport • Voice Application and Protocol

  16. Soft Real-Time Requirement:Voice Packetization and Transport • Voice packetization and transport: Packetize the compressed audio and send it out the IP interface; alternatively, receive a packet from the IP interface and provide it to the VoIP software. • Nature of communication: • Transmission: Normally, one packet ready every 10, 20, or 30 ms. • Reception: Subject to network jitter, one every 10, 20, or 30 ms. • Deadline for processing: • Processing should complete within the packet duration (10, 20, 30 ms), in order to keep from getting behind.

  17. Soft Real-Time Requirement:Voice Packetization and Transport (continued) • Repercussions of failure to meeting deadline: • May be handled by the Jitter Buffer on the receiving side. • Best-case • Missing deadline causes jitter buffer to grow, but does not cause lost packets; Results in increased latency because of a larger jitter buffer. • Worst-case • Missing deadline causes jitter buffer to discard a too-late packet; Packet loss compensation used to minimize impact on voice quality.

  18. Soft Real-Time Requirement:Voice Application and Protocol • Nature of communication: • Responds to reception of SIP packets, telephony events, and internal timers in order to drive Telephony Application functionality. • Deadline for processing: • Processing should be responsive enough for successful user experience. • Certain time-outs exist in SIP; however, retransmission techniques in the protocol allow recovery of some missed deadlines.

  19. Soft Real-Time Requirement:Voice Application and Protocol (continued) • Repercussions of failure to meeting deadline: • Noticeable lack of responsiveness of device. • Call failures are possible for excessive delays. • However, voice application and protocol deadlines are typically on the order of hundreds of milliseconds to several seconds. • As long as the Voice Application and Protocol are not blocked indefinitely, they should meet timing requirements.

  20. Best Effort in VoIP • Best Effort: Processes for which there is no deadline, but for which faster execution results in better system performance. • Best Effort requirements in VoIP: • Data IP Packet Transport

  21. Best Effort Requirement:Data Packet IP transport • Data Packet IP transport: Process the reception, transmission, forwarding, and bridging of TCP packets. • Nature of communication: • Packets can be received at wireline speeds (e.g. 100 Mbps). • Device processes as many packets as it can, discarding others. • Deadline for processing: • No deadline for processing, other than TCP ACK timeout. • Repercussions of failure to meeting deadline: • TCP packets retransmitted. • Lower data bandwidth. • These repercussions are intentional and acceptable.

  22. Implications of Real-time Requirements • A VoIP device has multiple processes with different MHz consumption and real-time needs. • This places stringent requirements on the OS, BSP, Memory, Cache, other software running on the RISC core, and the SoC design itself. • Each of these areas needs careful consideration. • This requires a system-wide approach rather than ad-hoc optimization of each piece.

  23. RISC SoC Design Considerations • VoIP Endpoint Device Software Overview • VoIP Endpoint Examples, Functionality, Software Blocks • Traditional Software Architecture (RISC + DSP) • New Software Architecture – VoIP on RISC • Real-time requirements in VoIP • Hard real-time, soft real-time, best effort • RISC SoC Design Considerations • Toolchain/BSP Considerations • Software Design Considerations • Conclusion

  24. RISC SoC Design Considerations • If VoIP requirements are taken into consideration at SoC design time, changes to the SoC design can result in improved VoIP system performance. • Areas of importance for VoIP: • Cache size and type • Memory bandwidth • On-chip scratch memory • Telephony Interface Hardware

  25. Cache size and type, and its effect on G.729AB MHz performance

  26. Memory bandwidth and its effect on G.729AB MHz performance

  27. On-chip scratch memory and its effect on VoIP performance • Use of on-chip SRAM can speed system performance by preventing cache miss penalties. • With a large enough on-chip SRAM, significant savings can result (>30%). • However, the software has to be modified to take advantage of on-chip SRAM.

  28. Telephony Interface Hardware: SoC’s Without a TDM port • Currently most RISC based SoCs have no synchronous serial interface appropriate for CODECs. • VoIP designs require a CPLD, increasing Bill of Materials (BOM). • Minimization of CPLD size will consume more MHz. • Costs to support 2-channel telephony interface: • > $.50 CPLD cost • ~10 MHz consumed by telephony interface software • More complicated Board and Software design

  29. SoC’s With a TDM port • The next generation of VoIP-capable RISC chips add: • Telephony interface • DMA capabilities • Benefits of using TDM/DMA for 2-channel telephony interface: • < $.10 to add TDM port to SoC • ~1 MHz consumed by telephony interface software • Real-time deadline loosened from 125 us to as high as 10 ms. • Simpler Board and Software design

  30. Toolchain / BSP Considerations • VoIP Endpoint Device Software Overview • VoIP Endpoint Examples, Functionality, Software Blocks • Traditional Software Architecture (RISC + DSP) • New Software Architecture – VoIP on RISC • Real-time requirements in VoIP • Hard real-time, soft real-time, best effort • RISC SoC Design Considerations • Toolchain/BSP Considerations • Software Design Considerations • Conclusion

  31. Toolchain / BSP Considerations:RTOS • OS requirements: • Guaranteed worst-case task switch latency that meets the VoIP latency deadlines. • A preemptive kernel. • A scheduler that prioritizes real-time tasks above non real-time tasks. • Examples: • Wind River VxWorks • MontaVista Linux (contains real-time improvements in the 2.6 Linux kernel) • Others (Nucleus, SuperTask, eCOS)

  32. Toolchain / BSP Considerations:RTOS (continued) Final OS choice involves cost tradeoffs: • License/royalty cost • Flash / Memory footprint. • Strong Tools Development Environment. • Bundled network/application software can lower development costs.

  33. Toolchain / BSP Considerations:Optimizing Compiler

  34. Toolchain / BSP Considerations:Peripheral Drivers • Peripheral drivers (Ethernet, Serial, USB, etc) may have a hard real-time impact on Voice software: • Peripheral ISR’s can hold off tasks past deadlines. • To avoid this, peripheral drivers may have to be modified to: • Separate the time critical portions of the driver from portions that can be run at lower priority. • Minimize the task latency imposed on real-time VoIP processes due to ISR’s.

  35. Software Design Considerations • VoIP Endpoint Device Software Overview • VoIP Endpoint Examples, Functionality, Software Blocks • Traditional Software Architecture (RISC + DSP) • New Software Architecture – VoIP on RISC • Real-time requirements in VoIP • Hard real-time, soft real-time, best effort • RISC SoC Design Considerations • Toolchain/BSP Considerations • Software Design Considerations • Conclusion

  36. Software Design Considerations • VoIP Software Partitioning • VoIP software should be partitioned into different tasks based on priority, not function. • This minimizes the MHz consumed in hard real-time tasks • This decreases negative effects due to the latency it imposes on other tasks.

  37. Software Design Considerations, continued • Task Priority Organization • Care has to be taken to make the optimal priority assignments for each task. • Sub-optimal assignment of task priorities can easily result in 40% higher MHz load due to the creation of unnecessary task switching.

  38. Conclusion • Single-core RISC SoC’s are the new approach for low-cost VoIP endpoints. • Combining Voice, Data, and Application Software has challenges. • A strong systems-level approach is required to conquer the challenges.

  39. Questions…Thank You.

More Related