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Overview. Full custom IC design flowTechnology: NCSU_FreePDK45Cadence 2007 design environmentHSPICELab1aDesign tutorial: Inverter designImplement and optimize a 4-bit SRAM cellLab1b 1K memory array characterization. 2. 3. Full Custom IC Design Flow. Data Preparation. Draw Schematic(V
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1. 1 EE 382M VLSI 1EE 360R Computer-Aided Integrated Circuit DesignLab 1 DemoFall 2011Whitney J. Wadlow