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An in-depth course on CMU's speech-processing wearable computers, focusing on power optimization and performance evaluation through design disciplines and smart module architecture. Learn the methodology, power measurements, and case studies for system-level advancements in mobile computing.
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A System Design And Build Course On Wearable Computers Dan Siewiorek and Asim Smailagic Carnegie Mellon University MSE ‘01, Las Vegas, June 2001
Overview • Introduction • Approach • Electronic Design in a Multidisciplinary Project • Design Methodology • Power Measurements • Evaluation • Conclusions
Introduction A System - Level design approach to the power and performance of CMU’s wearable computers dedicated to speech processing - the Speech Translator Smart Modules Power consumption has to be considered in all phases of system design
Introduction We examine the impact of processor speed, memory size, and type of secondary storage on power consumption and performance We see ahead a world of near-zero energy / weight / cost mobile systems
Approach Experimental framework includes a family of CMU wearable computers dedicated to speech processing - Smart Modules They perform speech recognition, language translation, and speech synthesis
Multidisciplinary Project Five major factors in a portable electronic system include: • Functionality • User Interface • Physical Form Factor • Power • Sensors
Multidisciplinary Project • Decisions made in one design discipline affect decisions in another discipline • The impact can be measured if the cost of the design decision can be reduced to a common “currency” • In mobile electronic systems that “currency” is power consumption
Major Factors in Portable Electronic Systems and their Relationship to the Design Disciplines
Smart Module Architecture The core of the smart module is the Cardio processor card, combining the processor and motherboard chips The Cardio also supports two serial ports for communication between the modules and a VGA interface
Smart Module Hardware Diagram • Processor • Memory • Chipsets Keyboard Mouse VGA CARDIO (For debugging only) Serial Ports IDE ISA PCMCIA HD ESS 1888 Communications To other Modules
Approach The code was profiled and tuned Profiling identified “hot spots” for HW and SW acceleration, and places to reduce computation and storage requirements
Power Measurements Power is consumed by • Processor • Memory • Disk • Sound Chip • Serial Ports
Power Measurements The power and performance measurements were taken using a body of 10 English test sentences for the Speech Recognizer and Language Translator, and their 10 Croatian translations for the Speech Synthesizer
Power Measurements A power profile for the Smart Modules included: • Idle Mode: processor is at nearly 0% usage • Full On Mode: processor is at nearly 100% usage Each state transition has an associated latency value
Power Measurements States for spinning disk drive: • Power Down Mode: power to the disk drive is shut off - when the module is in Suspend Mode • High Spin Mode: disk drive is being accessed • Low Spin Mode: power-saving mode
Power Measurements State diagrams for both processor and disk were combined to produce a new model for power consumption
New Model of Power Consumption Over Time Full on & High Spin Full On & Low Spin Idle & High Spin Idle & Low Spin Power (W) Suspend Time
Power Consumption Profile Power consumption of the Speech Recognizer module over time, using the 586-based Cardio and a spinning disk drive, was measured
Power Consumption of Speech Recognition Module Over Time Full Spin Spin Down Spin Down Spin Up Close TCP Link & Spin Up Spin Up Suspend
Performance Comparison The metric for comparison is proportional to the processing power, and inversely proportional to the product of volume, weight and power consumption
Performance Values for Wearable Computers 3 Volume (in ) Name SpecInt Weight ( lbs ) Power (watts) R (V*W*P) Log of Normalized TI 6030 175.00 260.00 7.50 36.00 70200.00 0.00 TIA-P 55.00 88.00 3.00 6.50 1716.00 1.11 TIA-O 55.00 45.00 2.50 4.50 506.25 1.64 SR-SM 175.00 45.00 2.13 4.00 382.50 2.26 OPT-SM 175.00 33.00 1.50 4.00 198.00 2.55
5 4.5 4 3.5 3 Goal: 2.8 2.5 Norm Log [perf/(vol*wt*power)] 2 1.5 Normalized Performance 1 0.5 0 0 1 2 3 4 5 6 Evolution of Systems Composite Performance of Speech Recognition Wearable Computers
Spot: SA-1110 Based Wearable Computer • New wearable computer as a research platform, including context aware computing • Low power design • 233 MHz StrongARM 1110 • 256 MB DRAM • Mobile, throttleable platform that can trade performance for energy
Conclusions Results show that there are orders of magnitude improvement from one generation of wearable computers to the next A system-level approach to power / performance optimization improved the metric by over a factor of 300 through the four generations, and over 400 through the five generations
Conclusions Peak demand by an application can often determine the battery life rather than average demand Audio-centric interfaces exhibit high demand “spikes,” potentially causing significantly reduced battery life
Summary • The options for the design space included: • Two processor architectures (Intel 486,586) • Three different processor speeds • Two different main memory sizes • Two different secondary storage types • The best configuration for performance is the 586/100/32 Flash, and the 486/75/16 Flash for power
Power Consumption of Speech Recognition Module • Our research indicates that the peak demand of an application can often determine the battery life rather than the average demand • Audio-centric interfaces exhibit high demand spikes • By filling in the valleys, it would be possible to cut the peak demand in half and thus significantly extend battery life