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COMPSCI 210 Semester 1 - 2014

COMPSCI 210 Semester 1 - 2014. Tutorial 2: Logic Gates. Review of Boolean algebra. Example 1 . Write the truth table for : B+(BA)=F(AB). _ _ _. Exercise 1 : write a “truth table” for: a) ( x + y + z )( xyz ) b ) (XYZ) + (XY) (Z+Y) c ) PT(P+Z). _. _. _. Basic logic gates. Not

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COMPSCI 210 Semester 1 - 2014

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  1. COMPSCI 210Semester 1 - 2014 Tutorial 2: Logic Gates

  2. Review of Boolean algebra Example 1 . Write the truth table for : B+(BA)=F(AB)

  3. ___ • Exercise 1: write a “truth table” for: • a) (x+y+z)(xyz) • b) (XYZ) + (XY) (Z+Y) • c) PT(P+Z) _ _ _

  4. Basic logic gates • Not • And • Or • Nand • Nor • Xor

  5. NAND Gate X Z X Y Z 0 0 1 0 1 1 1 0 1 1 1 0 NOT-AND Y NAND W = X.Y Z = W = X.Y _ ____ X ____ W Z = X.Y nand(Z,X,Y) Z Y

  6. NOR Gate NOR NOT-OR W X X Z Z Y Y _______ _ _______ Z = (X + Y) nor(Z,X,Y) W = X + Y Z = W = (X + Y) X Y Z 0 0 1 0 1 0 1 0 0 1 1 0

  7. (x+y)y y Rosen, §10.3 question 1 • Find the output of the following circuit • Answer: (x+y)y x+y __

  8. ___ _ _ x y x y x y Rosen, §10.3 question 2 • Find the output of the following circuit • Answer: xy

  9. x+y x Rosen, §10.3 question 6 • Write the circuits for the following Boolean algebraic expressions • x+y __

  10. (x+y)x x+y Rosen, §10.3 question 6 • Write the circuits for the following Boolean algebraic expressions • (x+y)x _______ x+y

  11. Example • Draw the circuit diagram to implement the expression

  12. Create truth table for the following circuit:

  13. 3.23 Create truth table for the following circuit:

  14. Decoder Exactly one output is 1 for each possible input Draw the truth table for this decoder

  15. De Morgan’s Theorem • NOT all variables • Change . to +and +to . • NOT the result • -------------------------------------------- __ __ __________ (X + Y) = X . Y _______ _______ __ __ ______ __ __ (X . Y) = (X + Y) = X + Y _______ __ __ __ __ __ __ ____ ( X . Y ) X + Y = = (X.Y)

  16. Latches • Latches • SR latch (NOR & NAND) • D Latch

  17. Latches • The SR Latch (NOR) • Consider the following circuit Q R R R Q Q Q S Q S Q S Symbol Circuit R S Qn+1 0 Qn (HOLD) 0 1 1 1 0 0 1 1 ? n+1 represents output at some future time n represents current output. Function Table

  18. R R S S Latches • The SR Latch(NAND) • NAND Form produces similar result from inverted inputs R S Qn+1 0 0 ? 0 1 0 1 0 1 1 1 Qn Q Q Q R Q Q Q S Function Table Symbol Circuit You ought to be able to figure this one out yourself!

  19. Memory • A flip-flop holds a single bit of memory • The bit “flip-flops” between the two NAND gates • In reality, flip-flops are a bit more complicated • Have 5 (or so) logic gates (transistors) per flip-flop • Consider a 1 Gb memory chip • 1 Gb = 8,589,934,592 bits of memory • That’s about 43 million transistors! • In reality, those transistors are split into 9 ICs of about 5 million transistors each

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