120 likes | 273 Views
FPGAs for Speed and Flexibility. By: Rowland S. Demko Date: Sept’2011. Say What?. High Speed I/O Control FPGA I/O Flexibility Processing Power Communications, Enablers, & Logic Putting It All Together Sophisticated Tools You Can’t Do More for Less. High Speed I/O Control. I/O Lines.
E N D
FPGAs for Speed and Flexibility By: Rowland S. Demko Date: Sept’2011
Say What? • High Speed I/O Control • FPGA I/O Flexibility • Processing Power • Communications, Enablers, & Logic • Putting It All Together • Sophisticated Tools • You Can’t Do More for Less
High Speed I/O Control I/O Lines CPU with RTOS PCI Bus FPGA Module with Integrated I/O I/O Module nanoseconds 1 usec I/O Lines Approaching 1000x Faster
FPGA I/O Flexibility Rear FPGA I/O Configurability Small FPGAs with Fixed I/O Configurations Front FPGA I/O Configurations PMC XMC AXM Mezzanine Modules: Digital: AXM-D0x Analog: AXM-Axx Supported on: IP-EP20x Supported on: PMC-LX/SX PMC-VLX/VSX XMC-VLX/VSX I/O Types: LVCMOS, LVTTL, LVDS, eLVDS
Processing Power • It’s all about Speed • IP-EP20x @ 125MHz • PMC-LX/SX @ 500MHz • PMC/XMC –VLX/VSX @ 550MHz • An then it’s about Simultaneous Parallel Execution • IP-EP20x DCM= None…1 Clock • PMC-LX/SX DCM= 8 • PMC/XMC –VLX/VSX DCM= 12
FPGA I/O Overview What have we learned so far… FPGAs are: Faster Than a Speeding? More Powerful than…? Rear I/O Connector Rear I/O Connector Front I/O Connector Front I/O Connector FPGA PMC/XMC-Module FPGA PMC/XMC-Module I/O Lines FPGA Device FPGA Device I/O Lines BUS Interface BUS INTFCE I/O Types: TTL, LVDS, RS422,RS485, More I/O Types: LVCMOS, LVTTL, LVDS, eLVDS
Communications, Logic, & Enablers FPGA PMC/XMC-Module Rear I/O Connector Front I/O Connector FPGA Device I/O Types: TTL, LVDS, RS422, RS485, More I/O Lines • LOGIC • Traditional VHDL • IP Cores Either: PCI, PCIX, PCIe • ENABLERS • Soft Core CPU • Operating System • HLL Coded Logic BUS INTFCE Communications: - Front & Rear I/O - Bus Interface
Putting it all Together • Components: • 6 DCMs • FFT using DSPs • Logic Sequencer and FIFO Mgmt on Soft Core with C Language Logic FPGA PMC/XMC-Module I/O Lines FPGA Device Apparatus Control@ 1MHz DDR Controller @ 200MHz DDR FFT Image Process@ 500MHz SDRAM BUS Intfce & SDRAM Control@ 100MHz Logic Sequence & FIFO Mgmt@ 200MHz SERDES@ 400MHz Either: PCI, PCIX, PCIe BUS INTFCE
Sophisticated Tools • Xilinx ISE Foundation – Development • For FPGA Logic Debug and Timing Analysis • Xilinx:: Chipscope • Altera:: SignalTap • For Modeling and Process Simulation • SimuLink • MathLab
You Can’t Do More for Less • Faster Logic Processing than any Real Time System • Soft-Cores enable powerful Customization of Capabilities and Re-Use • One Platform with a Multitude of I/O Options • Scalability • Designed to Work as Independently as necessary • Applications: Control, DSP, Communications, RT Simulation…..You Name it
For People Getting Anxious Sell FPGAs