Computer Architecture CST 250

Computer ArchitectureCST 250 Assembly Language Lesson No. 14 Prepared by:Omar Hirzallah

Contents • ALU Operations (Single & Two Operand) • Assembly Language (Case Study) • Instruction Types • Introduction to Programming With Assembly • Addressing Modes • Arithmetic Instructions • Logical Instructions (Bit Masking)

ALU Operation • Operations involves only a single operand: • Such as the accumulator, or read a work from the memory. e.g. inc dx ; increase the value of dx by 1 • Operation involves two operands: • Such as the accumulator and data word from the memory. e.g. add ax, bx ; add the contents of bx into ax

Single operand operation Clear: all the bits of the operand are cleared to zero. 0  [ A ] Complement ( invert), all bits are changed to their opposite logic level. [ X¯ ]  [ x ] Increment: the operand is increased by one. [ x +1 ]  [ x ] Decrement: the operand is decreased by one. [ x - 1 ]  [ x ]

Shift: • The bits of the operand are shifted to left or right one place and the empty bit is replace with 0. • In Memory the bit that is shifted out of the operand is not lost; instead it is shifted into the carry flag bit. 1 Cf

Rotate: • It is modified shift operation in which the C flag becomes a part of the circulating shift register along with the operand. Before ROR 0 1 After Rotate Right

Two operand ALU Operation • Add: • The ALU produces the binary sum of two operands: • One of the operands comes from the accumulator. • The other from the memory. • The result is placed in the accumulator. • If the addition produces a carry, the C flag is set to 1 otherwise C=0. [ A ] + [ M ]  [ A ]

Logical AND: • The corresponding bits of two operands are ANDed, the result is placed in the accumulator. [ A ] . [ M ]  [ A] Original contents of A Operand from Memory M Result of [ A] . [ M] in A

Logical OR: • The corresponding bits of two operands are ORed, the result is placed in the accumulator. [ A ] OR [ M ]  [ A] Original contents of A Operand from Memory M Result of [ A] OR [ M] in A

Subtract: • The ALU subtracts one operand (in Memory) from another one in the accumulator or a register) • Most Micro Processors use the 2’s complement . • Status register will be affected. [ A ] – [ M ]  [ A ] • Compare: • It is the same as subtraction operation, but the result will not be stored in the accumulator A. • This operation will affect the status register of the flags based on the result;

Assembly language ( case of study Intel processor)

General format of assembly instruction [ Label] Operation [ Operand ] [; Comment] Example: L1: cmp bx,cx ; compare bx with cx Add ax,25 Inc bx

Operand types • Registers: AX,BX,CX,DX,AL,AH,BL,BH,…..etc • Segment Registers: DS,ES,SS, and only as second operand: CS. • Memory: variable, [ Memory address] • Immediate: 5, 4Fh, 10000101b

CS SP Flags Of If Sf Zf Cf DS IP BP ax ah al SI SS ES DI bx bh bl cx ch cl dx dh dl Case of study (CPU Registers ) 15 0 8 7 0 15 16 bit form 8 bit form Data Registers Pointer & Index Register Segment Register

Instruction types • Data transfer instructions: They move data from one register/memory location to another. 2. Arithmetic instructions: They perform arithmetical operations. 3. Logical instructions: They perform logical operations. 4. Control transfer instructions: They modify the program execution sequence. 5. Input/output (I/O) instructions: They transfer information between external peripherals and system components ( CPU/Memory) • Processor control instructions: They control processor operation.

Introduction to programming with Assembly language

dx dx dx cx dx ax 1 1 0 0 0 0 0 0 1 1 0 0 0 1 1 0 0 1 0 1 0 1 0 1 0 0 0 0 1 1 0 1 0 0 1 1 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 0 0 0 0 1 0 0 1 1 1 1 1 0 1 1 1 0 • Example of : Data transfer Instruction • Mov Mov destination, source mov ax, 2 ; mov cx, ax ; mov dx,ffffh; mov dl,3 ; mov dx,3;

Example of : Arithmetic instruction Add register1, register2 Flags ALU Operation [ A ]

Example of CPU control Instruction: • The “No operation instruction” (NOP): • It does nothing. It is used for filling the space to insert any • additional instruction in future. • The “Halt Instruction” (HLT): • It is called wait , or break instruction to stop the processor.

Addressing Modes A. Basic Addressing Modes • Implied Addressing. • Register “Accumulator” Addressing. • Immediate Addressing. • Direct Addressing B.Advanced Addressing Modes • Index Addressing. • Register relative Addressing. • Indirect Addressing.

ADDRESSING MODES: Implied Addressing • No address is necessary, the location is implied by the instruction • NOP  No operation • HLT  Halt Register Addressing • The source and destination are registers • Source / Destination must be of equal size • For Example • MOV AX,BX • MOV AL,BL • MOV DX, SI

Immediate Addressing • Load a value to a register, the required data is an integral part of the instruction • For Example • MOV AX,1234h • MOV AX,5 • MOV AX, x Direct Addressing • data required is stored in memory • MOV AX,[1234h] Move data from a memory location to register AX, 1234h is a displacement within the data segment DS register • For Example • MOV AX,[x] Move the contents of DS:x from memory to register AX • MOV [x],AX Move the contents of register AX • to memory location DS:x

Index Addressing • Use the Base Register (BX or BP) plus the index registers (SI or DI) • For Example • MOV AX,[BX+DI] move to AX the value pointed by DS:BX+DI • MOV [BX+SI],AX move AX to memory location DS:BX+SI Register Relative • The data location is described relative to the current location • For Example • MOV AX,[BX+1234h] move to AX the value pointed by • DS:BX+1234h Indirect Addressing • The contents of a register is used as an address (Displacement is put in a register) • For Example • MOV AX,[BX] move to AX the value pointed by DS:BX • MOV [BX],AX move the contents of AX to the memory location of DS:BX

8086/8088 8086/8088 HLT / NOP MOV bx , cx Others Others TAX ; [ A ]  [ X ] • Implied addressing No address is required. • Register( Accumulator ) addressing Involves only internal registers or accumulator and no external RAM .

8086/8088 8086/8088 MOV AL , 37 ; 37  [ AL ] MOV BL , [ 0100 ] ;[ M 0100 ]  [ BL ] • Immediate addressing Others Others LDAA #$dd ; $dd  [ A ] [ operand is presented in the instruction it self] The number or data to be moved or operated; is in the memory location immediately following the Inst. op code . • Direct addressing The op code followed by a 1 or 2 byte memory address where the data to be found. [ operand is in memory ] LDA , (aaaa) ; [aaaa]  [ A ]

Revision MOV AX, [BX] Indirect Addressing MOV BL, [ 0200 ] Direct Addressing Register Addressing MOV BX, CX Immediate Addressing MOV AL,65 Implied Addressing NOP

8086/8088 0100 13 MOV AL,[ BX + 0100 ] ; [BX] = 03 , ; [ M=0103 ] = E3 [AL] 0101 ? 0102 ? 0103 E3 0104 FA 0105 ? • Register Relative addressing Uses two numbers to be added together, to determine the address of the source. Memory M

Assembly language ( case of study Intel processor) Topics: • Arithmetic instructions sample. • Bit manipulation/masking (Logical instructions)

Arithmetic instructions sample • add : Adds two operands. • inc: To increment a register by one. • dec: To decrement a register by one. • sub: Subtracts two operands. • Mul: Multiplication of two operands. • Div: Division of two operands.

Arithmetic instructions samples: add , inc , dec ,& sub Mov ax,5 ; add ax,3 ; Inc ax ; Dec ax ; Sub ax,6 ; Mov cx,8 ; Add ax,cx ; Sub ax,cx ;

Example 1. Multiply 4 by 3 : • Mov al,4 • Mov bl,3 • Mul bl ; ax = al*bl = 12 • It stores the result in ax register, overwriting the previous contents of ax. • Mul Inst. Takes a single operand and the al (ax) register is implicitly used for the second operand. • Example 2. Divide 4 by 2 : • Mov ax,4 • Mov cl,2 • Div cl • The div Instruction takes a single operand as does the mul inst., with the second operand always being stored in ax register, and the al (ax) register is implicitly used for the second operand.

In classExercises • What errors are presented in the following instructions? Mov ax 3d; comma missing after ax Mov 23,ax ; Destination operand must be register or variable Mov ch ,cx ; cannot move 16-bit register to 8 bit register Mov ax,1h ;ok Add 2,cx ; Destination operand must be register or variable Add 3,6 ; Destination operand must be register or variable Inc ax,2 ; only one operand required by inc Mov ax 3d Mov 23,ax Mov ch,cx Mov ax,1h Add 2,cx Add 3,6 Inc ax,2 • Write a program to evaluate the arithmetic expression • 5 +(6 - 2) ; leaving the the result in ax using: • one register. • Two register. & Three register

The solution • Write a program to evaluate the arithmetic expression • 5 +(6 - 2) ; leaving the the result in ax using: • one register. Mov ax,6 sub ax,2 Add ax,5 • Two register. Mov ax,6 Mov bx,2 Sub ax,bx Add ax,5 • Three register Mov ax,6 Mov bx,2 Mov cx,5 Sub ax,bx Add ax,cx

BIT MASKING (Logical Instructions) Clear  ANDing Set  ORing Change  XORing Clear without AND  XORing Q: Write the Assembly instructions to clear the bit # 1 and bit # 5 of AX register. Solution: The value of each bit of AX register is unknown, so we can denote the unknown value in AX register by x. By ANDing the above two, the AX will be So, the Assembly instruction will be: AND AX, FFDDh

Q: Write the Assembly instructions to clear AX register without AND Solution: The answer could be any one from the following two instructions. MOV AX,0 XOR AX,AX NOTE: If the value of a particular bit is not known, then we cannot clear that bit without AND, e.g. Clear bit#3,5 of BL without AND. (IMPOSSIBLE) Q: Write the Assembly instructions to change the bit # 2,3 of AX register. Solution: The value of each bit of AX register is unknown, so we can denote the unknown value in AX register by x. By XORing the above two, the AX will be So, the Assembly instruction will be: XOR AX, 000Ch

Q: Write the Assembly instructions to set the bits # 2,3,4,6 & 8 of BX register. Solution: The value of each bit of BX register is unknown, so we can denote the unknown value in BX register by x. By ORing the above two, the BX will be So, the Assembly instruction will be: OR BX, 015Ch

Computer Architecture CST 250