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Very low voltage 16-bit counter in high leakage static CMOS technology

Very low voltage 16-bit counter in high leakage static CMOS technology. Colin Stevens Low Power Electronics Elec6270 Instructor- Vishwani d. Agrawal. Theory and Simulation. .18µm TSMC process in Design Architect Vth NMOS: .3725v / Vth Pmos: -.3948 |Vtp| + Vtn = .7673V

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Very low voltage 16-bit counter in high leakage static CMOS technology

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  1. Very low voltage 16-bit counter in high leakage static CMOS technology Colin Stevens Low Power Electronics Elec6270 Instructor-Vishwani d. Agrawal

  2. Theory and Simulation • .18µm TSMC process in Design Architect • Vth NMOS: .3725v / Vth Pmos: -.3948 • |Vtp| + Vtn = .7673V • 90 ns transient analysis Using ELDO • Waveform Viewing in EZWAVE

  3. Counter Selection • Asynchronous • Advantages • Simple Design • Utilizes Clock Gating • Fast for small counters • Disadvantages • Ripple Effect • Delay Grows with Counter Size • Synchronous • Advantages • No Ripple Effect. Delay of all outputs are equal. • Disadvantages • More Logic Required • Flip Flops are clocked even when no transition is required

  4. Synchronous Counter

  5. EZWAVE Vdd = 1.2V

  6. Power, Delay, and Frequency

  7. Log Display and Power Delay Product

  8. Results 90ns Transient analysis

  9. Sub-threshold Results

  10. Optimizations and Conclusions • Potential Optimization • Low threshold gates could be used along the critical path of and gates to make the circuit faster at lower voltages. • Conclusions • Tradeoff between power and delay for a given circuit. • I would like to have gotten the predictive models to work.

  11. References • Agrawal, V. D. (2007). Power Dissipation in CMOS Circuits [Power Point Presentation]. Retrieved from: http://www.eng.auburn.edu/users/agrawvd/COURSE/E6270_Spr09/LECTURES/lpd_4_CMOSPower.ppt • Counter. (nd) .Retrieved April 15, 2009, from Wikipedia Website: http://en.wikipedia.org/wiki/Counter • Low-power electronics. (nd). Retrieved April 15, 2009, from Wikipedia Website: http://en.wikipedia.org/wiki/Low-power_electronics • Kulkarni, Vidya (nd). Logic Design Chapter – 5 [PowerPoint Presentation]. Retrieved from: forum.vtu.ac.in/~edusat/Prog5/logd/vrk/Chapter-5.ppt

  12. Questions? • Please don’t ask any questions.

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