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Very Low Voltage Operation of Benchmark Circuit c6288. Presented By: - Murali Dharan. Objectives. Reduce the power and power delay product of c6288 benchmark circuit To study the effect of voltage reduction on the power dissipation and delay
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Very Low Voltage Operation of Benchmark Circuit c6288 Presented By: - Murali Dharan
Objectives • Reduce the power and power delay product of c6288 benchmark circuit • To study the effect of voltage reduction on the power dissipation and delay • To operate the circuit at subthreshold voltage region and study its effect
Need for Voltage Reduction • Ptotal = Pstatic + Pdynamic • Power dissipation with technology scaling • High Pstatic dissipation from 65nm onwards
Circuit Operation • Above threshold voltage, transition due to channel current • Scaling down supply voltage reduces Short circuit power Vdd≤ |Vtp| + Vtn
Why Subthreshold operation? • Below threshold voltage, transition due to subthreshold current Isub= μ0 Cox(W/L)Vt2 exp {(VGS –VTH + ηVDS)/nVt} VDS = drain to source voltage η: a proportionality factor n = sub threshold slope factor (1 + Cd/Cox)
c6288 Circuit Design • The circuit was designed in Verilog • It was synthesized in 0.18 micron technology using LeonardoSpectrum • The synthesized netlist was imported into Design Architect • Timing and power analysis was done using ELDO
Conclusion • From the graphs, we can infer that the optimum low voltage operating point is 0.4V which is just above the threshold voltage. • Circuit still functions properly in subthreshold region and gives comparable energy savings to normal operation mode. • More circuits need to be tested to check for subthreshold voltage operations. • Check circuits in high leakage technologies like 65nm and below.
Future Research Work • Testing subthreshold operations of sequential circuits to check if operations like feedback causes circuits to malfunction. • Testing subthreshold operation of benchmark circuits at high leakage technologies as more leakage current can lead to faster switching with less power overhead leading to more energy savings.
References • Spring 2009 slides: ELEC6270 Low Power Design of Electronic Circuits • Dr. Vishwani D. Agrawal • “Modeling and sizing for Minimum Energy Operation in Subthreshold Circuits” IEEE Journal of Solid-State Circuits, Vol.40, No. 9, September 2005 • Benton H. Calhoun, Student member, IEEE, Alice Wang, Member, IEEE, and Anantha Chandrakasan, Fellow, IEEE