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Studies on NSW sTGC Strip Rate and Impact of 50ns L1 Data Transmission Frame at SLHC. S.Bressler 1 , T.Dai 2 , E.Diehl 2 , D.Gerbaudo 3 , S.Hou 4 , M.Liu 5 , N.Lu 2 , H.Song 5 at ATLAS NSW Electronics Workshop, Nov. 11, 2013. 1: Weizmann; 2:UM; 3:UC, Irvine; 4:Sinica; 5:USTC.
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Studies on NSW sTGCStrip Rate and Impact of 50ns L1 Data Transmission Frame at SLHC S.Bressler1, T.Dai2, E.Diehl2, D.Gerbaudo3, S.Hou4, M.Liu5, N.Lu2, H.Song5 at ATLAS NSW Electronics Workshop, Nov. 11, 2013 1: Weizmann; 2:UM; 3:UC, Irvine; 4:Sinica; 5:USTC
MC Sample • Signal (ATHENA full simulation): POWHEG Z/γµµ with mass (20,140)GeV • Pileups (ATHENA full simulation) : only added to current BC • PhaseI, based on ATLAS tag r4369, 50ns bunch spacing : 80.71812 low pt pileups and 0.2797092 high Pt pileups; • SLHC, based on ATLAS tag r4400, 25ns bunch spacing: 139.5128 low Ptpileups and 0.483448 high Pt pileups; • Cavern Backgrounds : scaled to luminosity, PhaseI L=3x1034cm2s-1; SLHC L=7x1034cm2s-1(SLHC), and flat time distribution (-100,100)ns • Random : from NSW requirements; • Correlated (charged tracks): from CSC measurements Fitted with exp func L=0.88x1033 Uncorrelated rate, use (A) Correlated rate
SLCH Sample Background Rates Random BKGs Pileups Correlated BKGs
Hit merge and digitization • Merge GENAT4 simulation hits in same sTGC gas gap, and close both in space and time and similar flight direction (hits from same track) • Minimum of 520 eV hit energy deposition to simulate sTGC gas gap inefficiencies due to various reasons (for instance, inactive region) • Digitizations • PAD and strip signal time digitized based on test beam and Garfield simulation results; • Apply 100ns VMM deadtime • Charge (ADC) spread to multiple strips based on H8 test beam results on charge sharing and position resolution • Merge strip ADC if digitized time within 25ns (44% from pileups) • VMM neighbor option on Strip clustering: grouping neighbor fired strip, Average fired strip 4.7/hit
sTGC Strip Rate in 25ns Window Large Side C Large Side A BG Sources: Total Signal Pileups Random Correlated Small Side A Small Side C
Event Size (25ns Window) for Inner Most 2 VMMs from sTGC Strips Large Sector Small Sector
Comments • The strip rate estimating is for 25ns bunch spacing, particular for sTGC trigger at current BC. • Dealing with MHz strip rate, maximum ~1.4MHz • How deep channel buffer needed? Simple calculation in case to deal with Phase II LV0 latency of 6µs at CTP, +500ns to NSW assuming to keep 7µs data : average size 9.8, buffer size : 9.8 + 3*sqrt(9.8) 20 • VMM bandwidth for companion chip? • PAD and wire rates need to be estimated to avoid any surprise • Average strip event size from inner most sTGC VMM chip is around 3.7 with window 25ns
Impact of 50ns sTGC Trigger Data Transmission Frame (Priliminary) 25ns Bunch Spacing W’ 25ns TrigData Frame 50ns Trigger Data Frame : unacceptable since missing 50% bunch crossing But it is possible for sTGC strip trigger data with PAD trigger since PAD trigger not fired all the time in a given region, by studying PAD trigger before W’? If YES (25ns deadtime), lost W’, what’s losing fraction?
MC Sample and PAD trigger 140 additional pileups are added into the sample at previous BC (=-1) PAD trigger : Decision with BCID Time Window (-25,30)ns Coincidence : 2 of 3 out of 4, except at edge 1 of 3 out 4 Average PAD triggers ~7
PAD trigger in Previous BC Average PAD triggers ~6
Case I : sTGC Router Trigger Data Transmission Frame 50ns Fiber TDS outputs TDS outputs to fiber arrangement based on router optimization (see sTGC router talk) Simple estimated impact: 7 PAD triggers from 32 NSW sectors, 3 fiber per sector layer PAD trigger per fiber 6/32/3 = 0.0625
sTGC Segmentation Efficiencies vsη Additional 8.9% sTGC L1 segment lost, lost hasη dependence
sTGC Segmentation Efficiencies vsPt Additional 8.9% sTGC L1 segment lost, No obvious Pt dependent lost!
Case II : sTGC Router Trigger Data Transmission Frame 25ns sTGC router compresses the TDS trigger data to 25ns frame, only looking the PAD trigger for single 64-ch TDS in Previous BC
Discussion • Lost 3.7% sTGC L1 trigger segments if using 50ns sTGC strip trigger data transmission on single 64 channel TDS in case router is able to transmit strip trigger data with 25ns frame; • The 50ns sTGC trigger data frame results in about 8.9% loss in L1 trigger with default router design • Further investigation will be carried out, to see if there is way to reduce L1 trigger inefficiency caused by 50ns trigger data frame • Note: such kind trigger lost is not simulated since MC sample only deal with CURRENT BC • In addition : • 90% sTGC efficiency, too low? How to improve? • Strange efficiency structure against η • Similar studies with new sTGC geometries, and wire arrangements (shifted by 1/4th between layers for best timing performance.