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2013.02.20 Reporter: PCLee

Integration of Hardware Assertions in Systems-on-Chip Jeroen Geuzebroek Bart Vermeulen jeroen.geuzebroek@nxp.com bart.vermeulen@nxp.com NXP Semiconductors citation count: 4 / conference: ITC’08. 2013.02.20 Reporter: PCLee. Introduction . What’s the problem:

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2013.02.20 Reporter: PCLee

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  1. Integration of Hardware Assertions in Systems-on-ChipJeroenGeuzebroek Bart Vermeulenjeroen.geuzebroek@nxp.com bart.vermeulen@nxp.comNXP Semiconductorscitation count: 4 / conference: ITC’08 2013.02.20 Reporter: PCLee

  2. Introduction • What’s the problem: • Assertion in hardware provide good observability for debug, but it may cost large area in complex design. • Proposed method: • This paper shown how hardware assertions can be integrated in existing on-chip debug infrastructure. • Scan-based infrastructure • Trace-based infrastructure

  3. Proposed method • Scan-based infrastructure • Trace-based infrastructure

  4. Experiment result

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