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Same readout components (including front end chip) for different detectors

Electronics for Gas detectors in TOTEM Walter Snoeys December 8th, 2006 more documentation: http://totem.web.cern.ch/Totem/work_dir/electronics. Same readout components (including front end chip) for different detectors

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Same readout components (including front end chip) for different detectors

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  1. Electronics for Gas detectors in TOTEMWalter SnoeysDecember 8th, 2006more documentation:http://totem.web.cern.ch/Totem/work_dir/electronics

  2. Same readout components (including front end chip) for different detectors For TOTEM gas detectors: compact (integrated) protection Prototype chip + results New Readout Circuit VFAT: first results TOTEM electronics system

  3. y u v 3 TOTEM Subdetectors Roman Pots T2 GEM T1 CSC SPS test Detector divided in 16 sectors of 32 Si strips24 pots of 10 planes 5 detector planes up to ~10 m away from IP 10 detector planes ~15m away from IP

  4. Discharge protection 20 cm2 vs ~14x3 mm2 • Discrete protection structure has been integrated in pitch adapter for APV (design by G. Cervelli and G. Anelli) • For VFAT diodes integrated, no AC coupling

  5. Integrated protection test M. Eraluoto, K. Kurvinen, R. Lauhakangas, L. Ropelewski and E. Noschis

  6. Integrated protection test Before discharges After discharges Conclusion: discharge protection circuit works correctlyWill incorporate it into VFAT (without AC coupling) for gas detector but not into VFAT for silicon

  7. Full run with all TOTEM circuits • Back from foundry • Three circuits submitted: • VFAT in two versions • Coincidence Chip CC • Repeater Chip LVDS • Standardization : all TOTEM detectors use the same integrated circuits • All features tested in the VFAT so far functional • Designers (CERN): P.Aspell, G. Anelli, K. Kloukinas, J. Kaplon, W. Snoeys • Designers (C4i): H. Mugnier, P. Chalmet LVDS CC CC VFAT VFAT_GEM VFAT VFAT_GEM

  8. The VFAT came back from the foundry and is on the test bench at the moment. • We are able to pulse each individual channel, obtain trigger and data signals from the chip, program the slow control registers. The noise is sufficiently low even with digital activity. No fault has been detected so far and the results obtained are extremely positive. • This is a very significant success and an important milestone for TOTEM. Slow Control Data Treatment Front end VFAT

  9. Some VFAT features • Designed to be clocked at 40 MHz. Maximum clock frequency not yet measured. Clock period determines time resolution. • Every clock cycle data is stored in memory. If a trigger received, full event transferred to readout buffer, from which it will be sent to readout (serial) • Generates a number of trigger bits, immediately upon detecting hit on one of its channels. The chip is divided into a set of configurable sectors. • Designed to accommodate up to 100kHz (at 40 MHz clock) average trigger rate. • Designed for radiation tolerance, both total dose and single event effects • Can test each channel individually • More documentation: see Paul Aspell’s presentation at TWEPP2007 More details in (http://totem.web.cern.ch/Totem/work_dir/electronics)

  10. VFAT tests

  11. 2006 TOTEM beam test

  12. Conclusions • Standardization of electronics across detectors • Prototype protection circuit works effectively • Integrated protection on final readout chip (VFAT2) • Operated Chip with detector in beam test • More documentation TWEPP2007 • P. Aspell et al. : VFAT • G. Antchev et al. Counting room electronics • Totem collaboration : The TOTEM Electronics system More details in (http://totem.web.cern.ch/Totem/work_dir/electronics)

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