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+ 3.3V Power (DVDDIO/AVDD)

Sequence 1. + 3.3V Power (DVDDIO/AVDD). + 1.8V Power (DVDD/PVDD). PWRDWN *. Keep Low during powering up. RESET *. I2C （ SCL,SDA ）. 5[ms](min). 5[ms](min). PWRDWN Release. I2C(Write ) Start. RESET Release. Question 1

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+ 3.3V Power (DVDDIO/AVDD)

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  1. Sequence 1 +3.3V Power (DVDDIO/AVDD) +1.8V Power (DVDD/PVDD) PWRDWN* Keep Low during powering up RESET* I2C（SCL,SDA） 5[ms](min) 5[ms](min) PWRDWNRelease I2C(Write)Start RESETRelease Question 1 In order to reset correctly, do we have to keep “reset = low” and “PWRDWN = high” for a while (5ms)? RESET*=Low後PWRDWN*=Lowにする。 ウェイトを設ける必要はない。

  2. Sequence 2 +3.3VPower (DVDDIO/AVDD) +1.8VPower (DVDD/PVDD) PWRDWN* • Keep Low during powering up RESET* I2C（SCL,SDA） 5[ms](min) 5[ms](min) PDN/RESETRelease Question 2 Or can PWRDWN pin and RESET pin rise high together? (If they rise high together, can register resetting be done correctly?) Which sequence (1 or 2) is better? In your comment, “The RESET pin should be held low when the supplies are being brought up, and it should be released after a minimum of 5ms after the supplies and PWRDN pin are up and stable.” So I think the sequence 1 is better. I2C(Write)Start

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