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ECE 665 Spring 2004 Computer Algorithms with Applications to VLSI CAD. Channel Routing Global Routing. Channel Routing Problem.
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ECE 665Spring 2004Computer AlgorithmswithApplications to VLSI CAD Channel Routing Global Routing
Channel Routing Problem Given a rectangular channel with terminals located on both sides of the channel, and a set of nets to be routed, place the nets in the channel to minimize its width [Has71,Yos84]. Formulation: • Assume uniform net width: track • Two layers of interconnect: • L1 for horizontal nets • L2 for vertical connections • Represent each net segment as an interval, indicating the terminal connections up or down ECE 665 - Routing
V = {net segments} E = horizontal relations between the nets: (vi, vj) E iff nets ni and nj overlap The density of IG (max clique size): dmax Channel density: d dmax Interval Graph Define an Interval Graph, IG(V,E) 1 2 4 3 1 2 3 4 In general, finding max clique size is NP-complete! ECE 665 - Routing
Channel Routing • Define routing regions = channels 1 1 2 2 Routing channel ECE 665 - Routing
1 1 2 2 Channel Routing • Perform routing of nets to minimize channel width ECE 665 - Routing
1 1 2 2 Channel Routing • Move blocks at a minimum distance (channel width) ECE 665 - Routing
1 2 1 2 Feasibility of Channel Routing • What happens when blocks move apart, when more space is needed ECE 665 - Routing
1 2 1 2 Routing Violation • Nets overlap because of change in relative pin position • Pins can move away but not sideways Problem: net overlap ECE 665 - Routing
Ordering of Routing Channels • Need to process channels in certain order, so that the routing of individual channels need not be redone • Does such an ordering exist ? 1 2 1 2 Process first Process this channel next ECE 665 - Routing
1 2 3 Channel Ordering • Channel ordering = topological sorting of OG(V, E) 2 • Create Channel Order Graph OG(V,E) • V = {channels} • E = “dead-end” relations between channels: • (ci, ck) E if ci ck 3 1 ECE 665 - Routing
1 2 2 B 4 C A 3 3 4 D E 1 6 5 F G 5 6 Channel Ordering Condition • Every layout is inherently routable iff its Channel Order Graph OG(V,E) is acyclic[Liu 82]. ECE 665 - Routing
4 2 2 B 3 3 L A 4 1 C 1 1 L E 2 D 3 Breaking Cyclic Constraints Break cyclic constraint by creating an L channel ECE 665 - Routing