Interprocessor Communications and MCAPI

1. Interprocessor Communications and MCAPI Colin Walls colin_walls@mentor.com

2. Agenda Multicore introduction MCAPI introduction MCAPI concepts MCAPI API MCAPI implementation Conclusions

3. Agenda Multicore introduction MCAPI introduction MCAPI concepts MCAPI API MCAPI implementation Conclusions

4. Embedded Multicore • Designs using multiple cores are becoming common • multiple cores on a chip • multiple chips on a board • any combination • Two hardware architectures: • homogenous – multiple identical cores • heterogeneous – multiple cores of different types • Broadly two software architectures: • SMP – Symmetrical MultiProcessing • AMP – Asymmetrical MultiProcessing

5. Symmetrical Multiprocessing - SMP • Single OS instance running on homogenous cores Application Thread 1 Thread M Nucleus Middleware Nucleus SMP Multicore Processor Core 1 Core N

6. Asymmetrical Multiprocessing - AMP • Multiple OS instances running on heterogeneous or homogenous cores Application 1 Application 2 Thread 1 Thread 1 Thread m Thread M Android Middleware Linux Nucleus MCAPI Multicore Processor Core 1 Core N

7. Multicore Architectures Heterogeneous Homogeneous AMP SMP

8. Current Multicore Processors • Heterogeneous devices • OMAP2 – ARM + DSP • OMAP3 – ARM + DSP + Accelerators • OMAP4 – (ARM x 2) + DSP + Accelerators • Homogeneous devices • Marvell – ARM x 2 • ARM Cortex-A9 MPCore – ARM x 4 • FreescaleQorIQ – PPC x 8 • MIPS 1004K – MIPS32 x 4

9. Mentor Embedded • To view the rest of this free presentation, including MCAPI concepts, API and implementation, visit Mentor Embedded.