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PowerBench Programmable Power Supply Final presentation – part A March 20 th , 2009

PowerBench Programmable Power Supply Final presentation – part A March 20 th , 2009. Gregory Kaplan Dmitry Babin Supervisor: Boaz Mizrahi. Project Overview. A versatile power supply unit with multiple outputs for laboratory use and testing of various electronic devices. Key features.

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PowerBench Programmable Power Supply Final presentation – part A March 20 th , 2009

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  1. PowerBenchProgrammable Power SupplyFinal presentation – part AMarch 20th, 2009 Gregory Kaplan Dmitry Babin Supervisor: Boaz Mizrahi

  2. Project Overview A versatile power supply unit with multiple outputs for laboratory use and testing of various electronic devices.

  3. Key features • Programmable source/sink/meter operation • Up to 4 independent channels • Two-way communication with a PC • Portable design • Modularity

  4. Portability features • Compact and lightweight case • USB interface • Sink and meter functions can operate from battery power

  5. Modular design • Configuration can be selected according to client needs: • 2 or 4 channels (with or w/o negative channel) • USB2.0 FS (12Mbit/s) or HS (480Mbit/s) • FPGA upgrade path exists • Can function without battery

  6. High-level overview D U T Power supply Control unit Measurement unit Active load User interface for standalone operation LEDs LCD Keys

  7. Specifications • Source operation • Output voltage: 0.9 to 12.6 V • Output current: 0 to 3.5 A • Programming resolution: < 5 mV • Ripple and noise: < 20 mV peak-to-peak • Settling time: < 1 ms • Programmable current limits • Load operation • Input current: 0 to 3.5 A • Programming resolution: < 5 mA • Settling time: < 0.5 µs • Meter capabilities • Bipolar voltage precision: < 5 mV (5 MHz bandwidth) • Bidirectional current precision: < 5 mA (1 MHz bandwidth)

  8. Expected performance – LDO • An example of the simulated transient response of the LDO circuit is shown below: • Output voltage step: 1V to 12.6V (with load current of 3.5A) • DUT input capacitance: 0μF, 10μF, 100μF, 1000μF • Lead inductance of 0.5μH and lead+contact resistance of 100mΩ (each lead) • Worst-case overshoot: ~ 120mV (~ 1%) • Settling time: <1ms to within 5mV

  9. Expected performance – load • An example of the simulated transient response of the active load circuit is shown below: • Load current step: 1A with a rise/fall time of 500ns (2MHz) • DUT voltage: 12.6V • Overshoot: 95mA • Settling time: 300ns to within 5% • Assumed lead inductance of 0.5uH and lead+contact resistance of 150mOhm

  10. Current status • 1st board (“digital”): • Local power supplies • USB comm. using chip vendor’s software • MCU in-circuit programming • FPGA configuration through JTAG and from the on-board SPI FLASH • Simple test firmware runs in all 3 chips • Misc. periphery to be tested: • Temperature monitoring chip • Real-time clock

  11. Current status • 2nd board (“analog”): • Assembled and will be tested as soon as sufficient firmware support is available

  12. Current status • 3rd board (“panel”): • Basic features not requiring firmware support • More thorough tests will be done as soon as sufficient firmware support is available

  13. Short-term roadmap • Establish a stable and comfortable working environment: • (Re)program any chip directly from PC (inprogress) • Use the LCD and keyboard as a debug console • Start development of the functional firmware and software, and use it to test the “analog” board

  14. Questions ?¿

  15. Statistics 1 project 2 partners 3 boards 17 months ~60 breakfasts at Zoran 129 different electronic components 612 Mb in project folder 996 nets 1221 total parts ~2200 man-hours 4017 solder pads

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