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ANITA RF Conditioning and Digitizing. Gary S. Varner University of Hawai , i, Manoa ANITA Collaboration Meeting UC, Irvine 24,25 November 2002. Topics. RF Signals Noise Limited RF Electronics Optimum SNR Triggering HS Transient Digitizers Prototypes STRAW2 DRS Advanced ATWD
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ANITARF Conditioning and Digitizing Gary S. Varner University of Hawai,i, Manoa ANITA Collaboration Meeting UC, Irvine 24,25 November 2002
Topics • RF Signals • Noise Limited • RF Electronics • Optimum SNR • Triggering • HS Transient Digitizers • Prototypes • STRAW2 • DRS • Advanced ATWD • R&D Plans (for discussion)
Askaryan Signature • Significant signal power at large frequencies • Strong linear polarization (near 100%)
Single Point Measurement Empirically determined Material, aperture Decoherence Freq. R • Squeeze all possible info. • Maximize R for better pointing… trigger latency
RF Transient Recorder Specs • ·>= 1GHz analog input bandwidth (300-1200MHz) • ·multi-GSa/s sampling rate (Nyquist limit ideal) • ·minimum phase distortion for clean polarization • ·maximum dynamic range (>= 9 bits) • ·internal Analog to Digital Conversion (ADC) • ·short record length (100-200ns if optimally matched) • ·self-triggering with fine threshold adjustment • ·bi-polar triggering • · deadtimeless conclude multi-hit buffering needed
Proposed Signal Flow Trigger LNA Gain [GHz] 1.2 .3 Digitize [GHz] .3 1.2
Straw-man Instrumentation Trigger /Digitizers
Possibilities • In principle, can do brute force with off-the-shelf ADCs/backend processing (POWER! But other issues) • A number of SCA designs: • DSC (samples obtained, to be tested) • KEK AMC • STRAW2 (SalSa prototype) • Advanced ATWD (Kleinfelder [UCI]) • Space/Balloon Transient RF specific: • >1GHz analog input bandwidth • Self-triggering • Low power
High-speed Digitizers DRC/DRS close • Analog BW not eval.
Domino Ring Sampler (DRS) input • Switched Capacitor Array (SCA) • If can keep the sampling jitter small enough (or can measure), no need for a TDC! • Free running domino wave, stopped with trigger • Sampling speed 2 GHz (500ps/bin), trigger gate sampling gives 50ps timing resolution • 1024 bins 150ns waveform + 350ns delay Information courtesy of Stefan Ritt (PSI): For further info.:http://meg.web.psi.ch/doc/talks/s_ritt/may02_triumf/meg.ppt
pb Domino Sampling Chip • Existing: • 0.5 – 1.2 GHz sampling speed • 128 sampling cells • Readout at 5 MHz, 12 bit • ~ 60 $/channel • Needed: • 2.5 GHz sampling speed • Circular domino wave • 1024 sampling cells • 40 MHz readout C. Brönnimann et al., NIM A420 (1999) 264
STRAW2 Specifications • Unique in this design is the triggering requirements • High freq and bipolar • Large latency strategy: • Multiple buffering
STRAW2 Architecture 0.25mm TSMC process
Analog Input Bandwidth! Component Length/area Unit Factor Funit Total [fF] Input traces 5 cm 0.2 pF/cm 1000 w.a.g. bonding wire 150 mil 0.3 pF/wire 300 w.a.g. input pad 60 um^2 187 fF/pad 187 Tanner input protection 594 l 1.1 pF/ckt 1100 SPICE stripline area 2500 um^2 43 aF/um^2 107.5 MOSIS stripline fringe 5 mm 60 aF/um 300 MOSIS Switch Drains 256 switches 5.6 fF/drain 1433.6 SPICE Open Switches 6 open 87 fF/gate 522 SPICE TOTAL 4.9501 pF • Many examples of high sampling rate, but: • PMT readout • Wireless (2.5GHz) • Very narrow BW • Naïve calculation • phase • inductance • 3-D Simulation • PCB, Package, bond wires • BGA necessary? • What is fundamental limit
RF Coupling Simulation die on-chip 50W stripline Bonding wires • Utilizes the LC program (FTDT algorithm) • Cray developed, available for free under Linux
S-Parameters VSWR: 1.8 [1GHz] 1.9 [2GHz]
Simulation Results • Use simulated high freq. Response from beamtest data: • works
STRAW2 Chip Self-Triggered Recorder Analog Waveform (STRAW) Self-Triggering: 16 Channels of 256 deep SCA buckets • LL and HL (adj.) • for each channel • Multiplicity trigger • for LL hits Optimized for RF input Microstrip50W 8192 analog storage cells On-chip ADC: 12-bit, >2MSPS Sampling Rate: 1-2GSa/s (adj.) Target input Bandwidth: >700MHz Sampling Rates >~8GSa/s possible w/ 0.25mm process Record length: 128-256ns External option: MUXed Analog out Submitted for Fab.: 4 Nov. Die:~2.5mm2
Cosmic-ray Radio Testbed Stage 2: Replace TDM with STRAW2 ~200 total antenna signals – get rid of delay cables
Evaluation Trigger /Digitizers
Readout Board/RF prototype Strong disincentive to purse a “full card” development to start with 10k$ parts!
Details…documentation Push to document these details
Preliminary Summary • R&D into critical (non-standard) components: • Strong need in other (e.g. precision timing) applications • Not needed for self-triggering/high analog BW (PMTs) • Emphasis on low-power • Plans: • STRAW2 Testing (packaged parts ship 12/19) • ANITA evaluation board/backup ADCs • Adv. ATWD Prototype (common START ready for fab.) • Discussion: (see next slide)
Discussion Items • Time scale for custom component development • STRAW2 appropriate triggering architecture? • Really need trigger waveform recording? • Sample depth/rate and bandwidth for ATWD? • Multi-buffering scheme acceptable? • Still consider RF down-conversion/comm. ADCs? • Many disadvantages (large BW DCV, power) • Viable fallback? • Plans: • STRAW2 Testing (packaged parts ship 12/19) • ANITA evaluation board/backup ADCs • Adv. ATWD Prototype (proto. Waiting for $$)
3 Designs Similar AMC: • 16 cells • All paracitics included • Domino speed: 1.5-2.2 GHz TSMC 0.25mm 10 GHz?
KEK AMC Analog Memory Cell (AMC) Common platform Original AMC follow-on Super Belle and JHF 0.5mm: LSB ~200ps 0.35mm: LSB ~100ps?